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Message-ID: <20080628162748.GA31029@8bytes.org>
Date:	Sat, 28 Jun 2008 18:27:48 +0200
From:	Joerg Roedel <joro@...tes.org>
To:	"Duran, Leo" <leo.duran@....com>
Cc:	Muli Ben-Yehuda <muli@...ibm.com>, Adrian Bunk <bunk@...nel.org>,
	"Richter, Robert" <rrichter@...e.amd.com>,
	linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org,
	Andi Kleen <andi@...stfloor.org>,
	"Biemueller, Sebastian" <Sebastian.Biemueller@....com>,
	tglx@...utronix.de, mingo@...hat.com,
	"Sarathy, Bhavna" <Bhavna.Sarathy@....com>
Subject: Re: [PATCH 01/34] AMD IOMMU: add Kconfig entry

On Sat, Jun 28, 2008 at 09:40:57AM -0500, Duran, Leo wrote:
> On Saturday, June 28, 2008 6:04 AM, Joerg Roedel wrote:
> 
> > Yes, there is only one exclusion range per IOMMU. The problem is that
> > an
> > exclusion range from 64MB to the end may not be possible because there
> > is
> > an exclusion range already configured in the ACPI table. On my System
> > for
> > example the exclusion range is somewhere in the first megabyte of RAM.
> > In this case the direct mapping using page tables is needed. If there
> > is
> > no exclusion range defined in ACPI this idea would work of course.
> > 
> > Joerg
> > 
> 
> Direct 1:1 mappings have a couple of issues:
> 1) They don't provide a performance optimization (i.e., table-walk still
> required)

True. But the table walk is nothing which could be optimized in
software. The optimization here is that we don't need to map/unmap on
each dma_ops call. Mapping/Unmapping requires TLB flushing and
completion_wait. This is expensive for the CPU. But direct mapping
exclusion ranges inside the aperture and mark the area from 64mb to the
end as the exclusion range as you suggested could be a real option.

> 2) Your aperture would have to be large enough so that virtual==physical
> (i.e., lots of memory for page-tables)

The AMD IOMMU supports multiple page sizes from 4kb up to 4GB. I don't
think that we need too much memory for the page tables.

Joerg

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