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Message-ID: <20080629142300.GA4599@polina.dev.rtsoft.ru>
Date:	Sun, 29 Jun 2008 18:23:00 +0400
From:	Anton Vorontsov <avorontsov@...mvista.com>
To:	Sergei Shtylyov <sshtylyov@...mvista.com>
Cc:	Alan Cox <alan@...rguk.ukuu.org.uk>, Ingo Molnar <mingo@...e.hu>,
	linux-ide@...r.kernel.org,
	Bartlomiej Zolnierkiewicz <bzolnier@...il.com>,
	linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
	Steven Rostedt <rostedt@...dmis.org>,
	Daniel Walker <dwalker@...sta.com>
Subject: Re: [PATCH v2 -rt] ide: workaround buggy hardware issues with
	preemptable hardirqs

On Sun, Jun 29, 2008 at 05:17:38PM +0400, Sergei Shtylyov wrote:
> Alan Cox wrote:
>
>>>   His boot log shows the native mode.
>
>> Then the bridge is misprogrammed
>
>>>   What's IDEIRT, some ISA bridge register? And why should one set  
>>> [A]PIC to level mode for legacy mode IDE? :-O
>
>> You need an NDA and then they'll send you the data sheet for the bridges
>> and other logic. It's all programmable.
>
>    That could be a very long story... :-|
>
>> "He has an OpenPIC, it's PowerPC SoC, so no ELCR either"
>
>> Really - he's using a designed for PC ISA bridge etc.. he might have all
>> sorts of stuff on it.
>
>   Ah, indeed. I meant to say that 8259 and ELCR are bypassed for PCI IRQs 
> (or at least Anton says so :-).

Yes, we don't use 8259 for the IDE interrupt.

-- 
Anton Vorontsov
email: cbouatmailru@...il.com
irc://irc.freenode.net/bd2
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