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Message-Id: <200807020234.26755.vda.linux@googlemail.com>
Date:	Wed, 2 Jul 2008 02:34:26 +0200
From:	Denys Vlasenko <vda.linux@...glemail.com>
To:	linux-arch@...r.kernel.org
Cc:	Russell King <rmk@....linux.org.uk>,
	David Howells <dhowells@...hat.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Lennert Buytenhek <kernel@...tstofly.org>,
	Josh Boyer <jwboyer@...ux.vnet.ibm.com>,
	Paul Mackerras <paulus@...ba.org>,
	David Woodhouse <dwmw2@...radead.org>,
	Andi Kleen <andi@...stfloor.org>,
	torvalds@...ux-foundation.org, akpm@...ux-foundation.org,
	Paul Gortmaker <paul.gortmaker@...driver.com>,
	linux-embedded@...r.kernel.org, linux-kernel@...r.kernel.org,
	Tim Bird <tim.bird@...sony.com>,
	Martin Schwidefsky <schwidefsky@...ibm.com>,
	Dave Miller <davem@...emloft.net>
Subject: [PATCH 3/23] make section names compatible with -ffunction-sections -fdata-sections: arm

The purpose of this patch is to make kernel buildable
with "gcc -ffunction-sections -fdata-sections".
This patch fixes arm architecture.

Signed-off-by: Denys Vlasenko <vda.linux@...glemail.com>
--
vda


--- 0.org/arch/arm/kernel/head-nommu.S	Wed Jul  2 00:40:39 2008
+++ 1.fixname/arch/arm/kernel/head-nommu.S	Wed Jul  2 00:44:22 2008
@@ -33,7 +33,7 @@
  * numbers for r1.
  *
  */
-	.section ".text.head", "ax"
+	.section ".head.text", "ax"
 	.type	stext, %function
 ENTRY(stext)
 	msr	cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
--- 0.org/arch/arm/kernel/head.S	Wed Jul  2 00:40:39 2008
+++ 1.fixname/arch/arm/kernel/head.S	Wed Jul  2 00:44:22 2008
@@ -74,7 +74,7 @@
  * crap here - that's what the boot loader (or in extreme, well justified
  * circumstances, zImage) is for.
  */
-	.section ".text.head", "ax"
+	.section ".head.text", "ax"
 	.type	stext, %function
 ENTRY(stext)
 	msr	cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
--- 0.org/arch/arm/kernel/init_task.c	Wed Jul  2 00:40:39 2008
+++ 1.fixname/arch/arm/kernel/init_task.c	Wed Jul  2 00:45:57 2008
@@ -30,7 +30,7 @@
  * The things we do for performance..
  */
 union thread_union init_thread_union
-	__attribute__((__section__(".data.init_task"))) =
+	__attribute__((__section__(".init_task.data"))) =
 		{ INIT_THREAD_INFO(init_task) };
 
 /*
--- 0.org/arch/arm/kernel/vmlinux.lds.S	Wed Jul  2 00:40:39 2008
+++ 1.fixname/arch/arm/kernel/vmlinux.lds.S	Wed Jul  2 00:46:03 2008
@@ -23,10 +23,10 @@
 #else
 	. = PAGE_OFFSET + TEXT_OFFSET;
 #endif
-	.text.head : {
+	.head.text : {
 		_stext = .;
 		_sinittext = .;
-		*(.text.head)
+		*(.head.text)
 	}
 
 	.init : {			/* Init code and data		*/
@@ -65,8 +65,8 @@
 #endif
 		. = ALIGN(4096);
 		__per_cpu_start = .;
-			*(.data.percpu)
-			*(.data.percpu.shared_aligned)
+			*(.percpu.data)
+			*(.percpu.shared_aligned.data)
 		__per_cpu_end = .;
 #ifndef CONFIG_XIP_KERNEL
 		__init_begin = _stext;
@@ -125,7 +125,7 @@
 		 * first, the init task union, aligned
 		 * to an 8192 byte boundary.
 		 */
-		*(.data.init_task)
+		*(.init_task.data)
 
 #ifdef CONFIG_XIP_KERNEL
 		. = ALIGN(4096);
@@ -137,7 +137,7 @@
 
 		. = ALIGN(4096);
 		__nosave_begin = .;
-		*(.data.nosave)
+		*(.nosave.data)
 		. = ALIGN(4096);
 		__nosave_end = .;
 
@@ -145,7 +145,7 @@
 		 * then the cacheline aligned data
 		 */
 		. = ALIGN(32);
-		*(.data.cacheline_aligned)
+		*(.cacheline_aligned.data)
 
 		/*
 		 * The exception fixup table (might need resorting at runtime)
--- 0.org/arch/arm/mm/proc-v6.S	Wed Jul  2 00:40:40 2008
+++ 1.fixname/arch/arm/mm/proc-v6.S	Wed Jul  2 00:44:28 2008
@@ -164,7 +164,7 @@
 	.asciz	"ARMv6-compatible processor"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	.section ".init.text", #alloc, #execinstr
 
 /*
  *	__v6_setup
--- 0.org/arch/arm/mm/proc-v7.S	Wed Jul  2 00:40:40 2008
+++ 1.fixname/arch/arm/mm/proc-v7.S	Wed Jul  2 00:44:28 2008
@@ -146,7 +146,7 @@
 	.ascii	"ARMv7 Processor"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	.section ".init.text", #alloc, #execinstr
 
 /*
  *	__v7_setup
--- 0.org/arch/arm/mm/tlb-v6.S	Wed Jul  2 00:40:40 2008
+++ 1.fixname/arch/arm/mm/tlb-v6.S	Wed Jul  2 00:44:28 2008
@@ -87,7 +87,7 @@
 	mcr	p15, 0, r2, c7, c5, 4		@ prefetch flush
 	mov	pc, lr
 
-	.section ".text.init", #alloc, #execinstr
+	.section ".init.text", #alloc, #execinstr
 
 	.type	v6wbi_tlb_fns, #object
 ENTRY(v6wbi_tlb_fns)
--- 0.org/arch/arm/mm/tlb-v7.S	Wed Jul  2 00:40:40 2008
+++ 1.fixname/arch/arm/mm/tlb-v7.S	Wed Jul  2 00:44:28 2008
@@ -78,7 +78,7 @@
 	isb
 	mov	pc, lr
 
-	.section ".text.init", #alloc, #execinstr
+	.section ".init.text", #alloc, #execinstr
 
 	.type	v7wbi_tlb_fns, #object
 ENTRY(v7wbi_tlb_fns)
--
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