linux-kernel - RE: [PATCH 3/6] AMD IOMMU: flush domain TLB when there is more than onepage to flush

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Message-ID: <6453C3CB8E2B3646B0D020C112613273013D91CF@sausexmb4.amd.com>
Date:	Thu, 3 Jul 2008 13:01:21 -0500
From:	"Duran, Leo" <leo.duran@....com>
To:	"Roedel, Joerg" <Joerg.Roedel@....com>, <mingo@...hat.com>,
	<tglx@...utronix.de>
CC:	"Richter, Robert" <rrichter@...e.amd.com>,
	<iommu@...ts.linux-foundation.org>, <linux-kernel@...r.kernel.org>,
	"Sarathy, Bhavna" <Bhavna.Sarathy@....com>
Subject: RE: [PATCH 3/6] AMD IOMMU: flush domain TLB when there is more than onepage to flush

On Thursday, July 03, 2008 12:35 PM, Joerg Roedel wrote:

> This patch changes the domain TLB flushing behavior of the driver.
When
> there
> is more than one page to flush it flushes the whole domain TLB instead
> of every
> single page. So we send only a single command to the IOMMU in every
> case which
> is faster to execute.
> 

Joerg,

Instead of flushing the complete TLB, how about just setting the
page-size encoding bits so as to cover all of the pages (rounded up to a
power of 2... which in some cases may flush a few more pages, but not
the complete TLB). This way other devices don't pay the 'flushing'
penalty every time you unmap a buffer for a given device.

Leo.

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