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Message-ID: <20080805121556.GA7426@ucw.cz>
Date: Tue, 5 Aug 2008 14:15:56 +0200
From: Pavel Machek <pavel@...e.cz>
To: Greg KH <gregkh@...e.de>
Cc: linux-kernel@...r.kernel.org, stable@...nel.org,
Justin Forbes <jmforbes@...uxtx.org>,
Zwane Mwaikambo <zwane@....linux.org.uk>,
Theodore Ts'o <tytso@....edu>,
Randy Dunlap <rdunlap@...otime.net>,
Dave Jones <davej@...hat.com>,
Chuck Wolber <chuckw@...ntumlinux.com>,
Chris Wedgwood <reviews@...cw.f00f.org>,
Michael Krufky <mkrufky@...uxtv.org>,
Chuck Ebbert <cebbert@...hat.com>,
Domenico Andreoli <cavokz@...il.com>, Willy Tarreau <w@....eu>,
Rodrigo Rubira Branco <rbranco@...checkpoint.com>,
Jake Edge <jake@....net>, Eugene Teo <eteo@...hat.com>,
torvalds@...ux-foundation.org, akpm@...ux-foundation.org,
alan@...rguk.ukuu.org.uk, "Rafael J. Wysocki" <rjw@...k.pl>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...e.hu>
Subject: Re: [patch 20/62] x86, suspend, acpi: enter Big Real Mode
On Wed 2008-07-30 16:58:31, Greg KH wrote:
> 2.6.26 -stable review patch. If anyone has any objections, please let
> us know.
>
> ------------------
> From: H. Peter Anvin <hpa@...or.com>
>
> Commit 3bf2e77453a87c22eb57ed4926760ac131c84459 upstream
>
> x86, suspend, acpi: enter Big Real Mode
>
> The explanation for recent video BIOS suspend quirk failures is that
> the VESA BIOS expects to be entered in Big Real Mode (*.limit = 0xffffffff)
> instead of ordinary Real Mode (*.limit = 0xffff).
>
> This patch changes the segment descriptors to Big Real Mode instead.
>
> The segment descriptor registers (what Intel calls "segment cache") is
> always active. The only thing that changes based on CR0.PE is how it is
> *loaded* and the interpretation of the CS flags.
>
> The segment descriptor registers contain of the following sub-registers:
> selector (the "visible" part), base, limit and flags. In protected mode
> or long mode, they are loaded from descriptors (or fs.base or gs.base can
> be manipulated directly in long mode.) In real mode, the only thing
> changed by a segment register load is the selector and the base, where the
> base <- selector << 4. In particular, *the limit and the flags are not
> changed*.
>
> As far as the handling of the CS flags: a code segment cannot be writable
> in protected mode, whereas it is "just another segment" in real mode, so
> there is some kind of quirk that kicks in for this when CR0.PE <- 0. I'm
> not sure if this is accomplished by actually changing the cs.flags register
> or just changing the interpretation; it might be something that is
> CPU-specific. In particular, the Transmeta CPUs had an explicit "CS is
> writable if you're in real mode" override, so even if you had loaded CS
> with an execute-only segment it'd be writable (but not readable!) on return
> to real mode. I'm not at all sure if that is how other CPUs behave.
>
> Signed-off-by: "H. Peter Anvin" <hpa@...or.com>
> Signed-off-by: Ingo Molnar <mingo@...e.hu>
ACK.
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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