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Date:	Tue, 5 Aug 2008 19:25:49 +0200
From:	Karsten Keil <kkeil@...e.de>
To:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, isdn4linux@...tserv.isdn4linux.de,
	"Andreas.Eversberg" <Andreas.Eversberg@...satel.de>
Subject: Re: [PATCH 3/4] Fix remaining big endian issue of hfcmulti

On Tue, Aug 05, 2008 at 11:04:26PM +1000, Benjamin Herrenschmidt wrote:
> 
> > Thanks for this hint, I didn't know that the repetive versions are
> > for byte streams and not for eg. transfer of multiple u32.
> > So it makes things lot easier the code should look like:
> > 
> > 	int l = len >> 2;
> > 
> > 	if (l) {
> > 		ioread32_rep(hc->pci_membase + A_FIFO_DATA0, data, l);
> > 		data += l << 2;
> > 	}
> > 	if (len & 2) {
> > 		ioread16_rep(hc->pci_membase + A_FIFO_DATA0, data, 1);
> > 		data += 2;
> > 	}
> > 	if (len & 1)
> > 		writeb(*data, hc->pci_membase + A_FIFO_DATA0);
> 
> Don't mix the io* variants with the PCI variants. Use iowrite8 for the
> last one and make sure you do a proper pci_iomap.

Yes, OK it need some cleanups in other places as well.

> 
> One cool thing with the new iomap stuff is that it also works for both
> PIO and MMIO, so you no longer need to differenciate writeX from outX
> as long as you use the right mapping stuff initially.
> 

Yes this stuff looks really cool, but unfortunately in our case it is not
so easy to remove the different IO functions for MMIO and PIO, since for
MMIO the chip use a flat register model, for PIO it use indirect addressing
via only 2 ports, one for the register offset and one for the data IO.

Maybe we can use the trick from lib/iomap.c to detect which
kind of IO is needed, but unfortunately PIO_OFFSET, PIO_MASK and
PIO_RESERVED are not exported so it would need to copy the defines, which
isn't a really clean solution.

-- 
Karsten Keil
SuSE Labs
ISDN and VOIP development
SUSE LINUX Products GmbH, Maxfeldstr.5 90409 Nuernberg, GF: Markus Rex, HRB 16746 (AG Nuernberg)
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