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Message-ID: <20080814133652.GA10972@elte.hu>
Date: Thu, 14 Aug 2008 15:36:52 +0200
From: Ingo Molnar <mingo@...e.hu>
To: Yinghai Lu <yhlu.kernel@...il.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
Alan Cox <alan@...rguk.ukuu.org.uk>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: [PATCH] irq: sparse irqs, fix #2
>From 28f153577fc82ff93cd63472134b40f0634bff70 Mon Sep 17 00:00:00 2001
From: Ingo Molnar <mingo@...e.hu>
Date: Thu, 14 Aug 2008 15:38:50 +0200
Subject: [PATCH] irq: sparse irqs, fix #2
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
fix:
In file included from arch/x86/kernel/setup.c:99:
include/asm-x86/mach-default/mach_apic.h:142: error: expected ‘)’ before ‘->’ token
That hunk got mis-merged.
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
include/asm-x86/mach-default/mach_apic.h | 27 ++++++++++++++-------------
1 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index a4a8f92..ea04182 100644
--- a/include/asm-x86/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
@@ -85,6 +85,20 @@ static inline int apicid_to_node(int logical_apicid)
return 0;
#endif
}
+
+static inline cpumask_t vector_allocation_domain(int cpu)
+{
+ /* Careful. Some cpus do not strictly honor the set of cpus
+ * specified in the interrupt destination when using lowest
+ * priority interrupt delivery mode.
+ *
+ * In particular there was a hyperthreading cpu observed to
+ * deliver interrupts to the wrong hyperthread when only one
+ * hyperthread was specified in the interrupt desitination.
+ */
+ cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
+ return domain;
+}
#endif
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
@@ -139,18 +153,5 @@ static inline void enable_apic_mode(void)
{
}
-static inline cpumask_t vector_allocation_domain(int cpu)
-{
- /* Careful. Some cpus do not strictly honor the set of cpus
- * specified in the interrupt destination when using lowest
- * priority interrupt delivery mode.
- *
- * In particular there was a hyperthreading cpu observed to
- * deliver interrupts to the wrong hyperthread when only one
- * hyperthread was specified in the interrupt desitination.
- */
- cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
- return domain;
-}
#endif /* CONFIG_X86_LOCAL_APIC */
#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */
--
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