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Message-Id: <1219026451.16428.4.camel@sli10-desk.sh.intel.com> Date: Mon, 18 Aug 2008 10:27:31 +0800 From: Shaohua Li <shaohua.li@...el.com> To: lkml <linux-kernel@...r.kernel.org> Cc: Andrew Morton <akpm@...ux-foundation.org>, Ingo Molnar <mingo@...e.hu>, "Pallipadi, Venkatesh" <venkatesh.pallipadi@...el.com> Subject: [patch]pageattr: cache flush before tlb flush clflush uses a virtual address but cache line is physical indexed in x86. In my understanding, clflush will do some pagetable walk, so doing cache flush first should reduce some pagetable walk. Signed-off-by: Shaohua Li <shaohua.li@...el.com> diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index f5f5154..d8b24df 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -168,10 +168,8 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache) BUG_ON(irqs_disabled()); WARN_ON(PAGE_ALIGN(start) != start); - on_each_cpu(__cpa_flush_range, NULL, 1); - if (!cache) - return; + goto tlb_flush; /* * We only need to flush on one CPU, @@ -188,6 +186,9 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache) if (pte && (pte_val(*pte) & _PAGE_PRESENT)) clflush_cache_range((void *) addr, PAGE_SIZE); } + +tlb_flush: + on_each_cpu(__cpa_flush_range, NULL, 1); } /* -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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