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Message-ID: <86802c440808270045o2d2390d3ka969095da671bd81@mail.gmail.com>
Date:	Wed, 27 Aug 2008 00:45:26 -0700
From:	"Yinghai Lu" <yhlu.kernel@...il.com>
To:	benh@...nel.crashing.org
Cc:	"Ingo Molnar" <mingo@...e.hu>,
	"Thomas Gleixner" <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	"Andrew Morton" <akpm@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, "Pavel Machek" <pavel@...e.cz>,
	"Jesse Barnes" <jbarnes@...tuousgeek.org>
Subject: Re: RFC [PATCH] x86/pci: reserve extra page to avoid error caused by P2P pref DMA reads

On Wed, Aug 27, 2008 at 12:40 AM, Benjamin Herrenschmidt
<benh@...nel.crashing.org> wrote:
> On Wed, 2008-08-27 at 00:29 -0700, Yinghai Lu wrote:
>> Diag guys, found one system when loading is high, will have gart wark error.
>> root cause is P2P bridge try to prefetch for several intel e1000 under
>> it. and that skb is near GART iommu area.
>>
>> try to reserve page in the boundary at first.
>> last page near TOM2, and last page near MMIO
>> also gart first and last page.
>>
>> need one better way for all arch support PCI and memory with a lot of holes etc.
>
> Sounds like a similar problem for which we don't unmap GART pages,
> just map them read-only and route them to a dummy page. In that
> case, the right approach is to write the last page of the GART
> to the dummy page as well and mark it occupied. That shouldn't
> involve actually reserving memory.

i should split it into two patches. that patch include two patch
second part is doing map to scratch memory.

but memory near TOP of MEMORY and TOP of MEMORY2, could have the same problem.

YH
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