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Message-ID: <20080903211029.187d8dab@infradead.org>
Date:	Wed, 3 Sep 2008 21:10:29 -0700
From:	Arjan van de Ven <arjan@...radead.org>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	Alok Kataria <akataria@...are.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Larry Finger <Larry.Finger@...inger.net>,
	LKML <linux-kernel@...r.kernel.org>,
	"Rafael J. Wysocki" <rjw@...k.pl>, Michael Buesch <mb@...sch.de>,
	Dan Hecht <dhecht@...are.com>
Subject: Re: [PATCH] Fix TSC calibration issues

On Wed, 3 Sep 2008 20:59:05 -0700 (PDT)
Linus Torvalds <torvalds@...ux-foundation.org> wrote:

> The only frequency we can trust on 99% of all machines is the PIT,

pmtimer is also quite ok, with the exception of some K6 based boxes.
(I'm surprised the K6 boxes even have enough modern stuff to have
pmtimer; I'd think they would fall under the date cutoff)

> and it's a very uncomfortable programming model due to all the
> history (it is one of the few truly 8-bit things left in a modern
> PC). The other options are just not reliably there, or are known to
> not have a stable frequency.
> 
> So how would you suggest we do it? Lowering the wait to 5ms (times 5,
> so it's really 25ms, although we can probably stop early if the first 
> iterations are very consistent) will work, but it _will_ reduce
> precision. And it's still real time.

one of the options we have is to start with an initial
rough-but-conservative estimate, and refine it over time as the system
is running.... sort of like ntp but for the calibration.

another option for calibrating the tsc rate is to read it from the
msr's/cpuid/aperf of what the hardware says it should be, and then all
we need is to verify it is that; that we could do over timer or quickly.
(of course that only works for systems with constant tsc)


-- 
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