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Message-ID: <20080906124234.GG30964@elte.hu>
Date: Sat, 6 Sep 2008 14:42:34 +0200
From: Ingo Molnar <mingo@...e.hu>
To: venkatesh.pallipadi@...el.com
Cc: tglx@...utronix.de, hpa@...or.com, linux-kernel@...r.kernel.org,
shaohua.li@...el.com, Yinghai Lu <yhlu.kernel@...il.com>
Subject: Re: [RFC 0/4] Using HPET in MSI mode and setting up per CPU HPET
timers
* venkatesh.pallipadi@...el.com <venkatesh.pallipadi@...el.com> wrote:
> Patchset that uses HPET timers in MSI mode (when supported) and sets
> up per CPU HPET timers. This removes the dependency on IRQ0 timer
> broadcast with LAPIC stopping in deep C-state, on platforms that
> support HPET MSI mode.
>
> On my test system with dual core CPU, the number of timer related
> interrupts (HPET_MSI + IRQ0 + LAPIC) comes down from 180 to 95 over a
> period of 10s, with these patches. This is on an idle system with
> tickless enabled and when system is idle.
>
> Patches against tip.
cool stuff!
this is _really_ how a modern dynticks system should look like on x86 -
proper per CPU hardware timers that are southbridge based.
There's a few routine checks this new has to pass: we've got to see how
widely this works and whether there are any bugs/quirks to take care of,
so i created a separate feature topic for it: tip/timers/hpet-percpu.
This tip/timers/hpet-percpu feature topic tree is based on irq/sparseirq
+ timers/hpet + timers/urgent - which had some changes in the hpet area.
I merged up the conflicts - please double check the result. I also did
cleanups for a few style problems that were present in hpet.c.
I've merged it into tip/master as well and will run a few tests before
pushing it out.
Ingo
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