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Message-ID: <20080910223711.GA16740@ldl.fc.hp.com>
Date: Wed, 10 Sep 2008 16:37:11 -0600
From: Alex Chiang <achiang@...com>
To: "Zhao, Yu" <yu.zhao@...el.com>
Cc: Jesse Barnes <jbarnes@...tuousgeek.org>, linux-pci@...r.kernel.org,
Randy Dunlap <randy.dunlap@...cle.com>,
Greg KH <greg@...ah.com>,
Grant Grundler <grundler@...isc-linux.org>,
Matthew Wilcox <matthew@....cx>, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, virtualization@...ts.linux-foundation.org,
xen-devel@...ts.xensource.com
Subject: Re: [PATCH 1/4 v2] PCI: introduce new base functions
* Zhao, Yu <yu.zhao@...el.com>:
>
> It can be PCI_BRIDGE_RESOURCES, because there may be some
> non-standard resources following PCI_ROM_RESOURCE and before
> PCI_BRIDGE_RESOURCES.
>
> For example, a standard PCI device has following resources:
> 0 - 5 BARs
> 6 ROM
> 7 - 10 Bridge
>
> After SR-IOV is enabled, it becomes
> 0 - 5 standard BARs
> 6 Rom
> 7 - 12 SR-IOV BARs
> 13 - 16 Bridge
Ok, makes sense now; was that documented somewhere else, and I
just missed it?
> Same as above, the PCI_BRIDGE_RES_END varies when some features
> is enabled or disabled.
Ok, I must have missed this documentation too.
> Thank you very much for carefully reviewing these patches. I'd
> like to invite you to review next version again if it's
> convenient for you.
Sure, you can Cc me next time too.
Thanks.
/ac
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