linux-kernel - Re: [PATCH 0/3] fix GART to respect device's dma

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Message-ID: <20080917002404.GG25711@one.firstfloor.org>
Date:	Wed, 17 Sep 2008 02:24:04 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
Cc:	andi@...stfloor.org, mingo@...e.hu, joerg.roedel@....com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] fix GART to respect device's dma_mask about virtual mappings

On Wed, Sep 17, 2008 at 08:53:42AM +0900, FUJITA Tomonori wrote:
> On Tue, 16 Sep 2008 19:58:24 +0200
> Andi Kleen <andi@...stfloor.org> wrote:
> 
> > > > Those always are handled elsewhere in the block layer (using the bounce_pfn
> > > > mechanism)
> > > 
> > > I don't think that the bounce guarantees that dma_alloc_coherent()
> > > returns an address that a device can access to.
> > 
> > dma_alloc_coherent() is not used for block IO data. And dma_alloc_coherent()
> > does handle masks > 24bit < 32bits just fine.
> 
> What do you mean? For example, some aacraid cards have 31bit dma
> mask. What guarantees that IOMMUs's dma_alloc_coherent don't return a
> virtual address > 31bit < 32bit?

At least the old IOMMU implementations (GART, non GART) handled this
by falling back to GFP_DMA. I haven't checked if that didn't get broken
in the recent reorganization, but if it got it should be fixed of course.
But hopefully it still works.

But that has nothing to do with _map_sg() anyways. The semantics here
are quite different, matching traditional i386 semantics. On i386
_alloc_coherent always did this logic, and map_sg/map_single didn't
do anything.

> 
> 
> > > I'm not familiar with what the networking does, for example, seems
> > > that b44 sets dev->dma_mask to DMA_30BIT_MASK and b44_start_xmit()
> > > does:
> > > 
> > 
> > b44 (and related designs like the bcm wireless chipset) 
> > has its own bouncing scheme. IT doesn't need any hacks in map_sg
> >  
> > > IOMMUs can try to return an address that the NIC can access to.
> > 
> > It's not worth to handle this strange case. The drivers do anyways.
> > These are very cheap devices which are only rarely used in systems
> > with >2GB and for those cases the existing bouncing setup works fine.
> 
> I think that the patch is a pretty straightforward, it just the same
> thing that IOMMUs with > 32bits virtual address space do. We can do
> better with the simple patch. But I'm ok with dropping the patch for
> GART since we can live without the patch, as you said.

The semantics are a little weird and non intuitive I agree. Perhaps it would 
make sense to document them properly? 

With the DMA allocator rework I did some time ago it would be actually
relatively straight forward to do. But to do it properly would
require doing it for 32bit x86 too, and frankly I don't think it's
worth doing there. Devices with such weird masks are on their way out
and after we survived this plague for years and finally things are 
getting better I don't think it's worth complicating basic infrastructure
for this.

-Andi
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