linux-kernel - [PATCH] x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC

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Message-ID: <20080918191210.GD23287@alberich.amd.com>
Date:	Thu, 18 Sep 2008 21:12:10 +0200
From:	Andreas Herrmann <andreas.herrmann3@....com>
To:	Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...e.hu>
CC:	linux-kernel@...r.kernel.org
Subject: [PATCH] x86: c1e_idle: don't mark TSC unstable if CPU has
	invariant TSC

.. otherwise TSC is marked unstable on AMD family 0x10 and 0x11 CPUs.
This would be wrong because for those CPUs "invariant TSC" means:

   "The TSC counts at the same rate in all P-states, all C states, S0,
   or S1"

(See "Processor BIOS and Kernel Developer's Guides" for those CPUs.)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@....com>

---
 arch/x86/kernel/process.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

Please apply for 2.6.27.

Thanks,


Andreas


diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 7fc4d5b..ba6b16b 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -265,7 +265,8 @@ static void c1e_idle(void)
 		rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 		if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 			c1e_detected = 1;
-			mark_tsc_unstable("TSC halt in C1E");
+			if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+				mark_tsc_unstable("TSC halt in C1E");
 			printk(KERN_INFO "System has C1E enabled\n");
 		}
 	}
-- 
1.6.0.1



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