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Message-Id: <48D21BA3.76E4.0078.0@novell.com>
Date: Thu, 18 Sep 2008 08:13:07 +0100
From: "Jan Beulich" <jbeulich@...ell.com>
To: "Ingo Molnar" <mingo@...e.hu>
Cc: <tglx@...utronix.de>, <linux-kernel@...r.kernel.org>,
<hpa@...or.com>
Subject: [PATCH] x86: x86_{phys,virt}_bits field also for i386 (v3)
Make the x86_{phys,virt}_bits common for 32- and 64-bits, and use the
former in ioremap's phys_addr_valid() check also on 32bit/PAE.
Signed-off-by: Jan Beulich <jbeulich@...ell.com>
---
arch/x86/kernel/cpu/common.c | 17 +++++++++++++++--
arch/x86/mm/ioremap.c | 15 +++++++--------
include/asm-x86/processor.h | 4 ++--
3 files changed, 24 insertions(+), 12 deletions(-)
--- linux-tip.orig/arch/x86/kernel/cpu/common.c
+++ linux-tip/arch/x86/kernel/cpu/common.c
@@ -439,6 +439,11 @@ void __cpuinit cpu_detect(struct cpuinfo
c->x86_cache_alignment = c->x86_clflush_size;
}
}
+
+#ifdef CONFIG_X86_32
+ if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
+ c->x86_phys_bits = 36;
+#endif
}
static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
@@ -464,14 +469,18 @@ static void __cpuinit get_cpu_cap(struct
}
}
-#ifdef CONFIG_X86_64
if (c->extended_cpuid_level >= 0x80000008) {
u32 eax = cpuid_eax(0x80000008);
c->x86_virt_bits = (eax >> 8) & 0xff;
c->x86_phys_bits = eax & 0xff;
+ /* CPUID workaround for Intel 0F33/0F34 CPU */
+ if (c->x86_vendor == X86_VENDOR_INTEL
+ && c->x86 == 0xF && c->x86_model == 0x3
+ && (c->x86_mask == 0x3
+ || c->x86_mask == 0x4))
+ c->x86_phys_bits = 36;
}
-#endif
if (c->extended_cpuid_level >= 0x80000007)
c->x86_power = cpuid_edx(0x80000007);
@@ -519,6 +528,8 @@ static void __init early_identify_cpu(st
c->x86_clflush_size = 64;
#else
c->x86_clflush_size = 32;
+ c->x86_phys_bits = 32;
+ c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;
@@ -641,6 +652,8 @@ static void __cpuinit identify_cpu(struc
#else
c->cpuid_level = -1; /* CPUID not detected */
c->x86_clflush_size = 32;
+ c->x86_phys_bits = 32;
+ c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;
memset(&c->x86_capability, 0, sizeof c->x86_capability);
--- linux-tip.orig/arch/x86/mm/ioremap.c
+++ linux-tip/arch/x86/mm/ioremap.c
@@ -22,13 +22,17 @@
#include <asm/pgalloc.h>
#include <asm/pat.h>
-#ifdef CONFIG_X86_64
-
static inline int phys_addr_valid(unsigned long addr)
{
- return addr < (1UL << boot_cpu_data.x86_phys_bits);
+#ifdef CONFIG_RESOURCES_64BIT
+ return !(addr >> boot_cpu_data.x86_phys_bits);
+#else
+ return 1;
+#endif
}
+#ifdef CONFIG_X86_64
+
unsigned long __phys_addr(unsigned long x)
{
if (x >= __START_KERNEL_map) {
@@ -47,11 +51,6 @@ EXPORT_SYMBOL(__phys_addr);
#else
-static inline int phys_addr_valid(unsigned long addr)
-{
- return 1;
-}
-
#ifdef CONFIG_DEBUG_VIRTUAL
unsigned long __phys_addr(unsigned long x)
{
--- linux-tip.orig/include/asm-x86/processor.h
+++ linux-tip/include/asm-x86/processor.h
@@ -74,9 +74,9 @@ struct cpuinfo_x86 {
#else
/* Number of 4K pages in DTLB/ITLB combined(in pages): */
int x86_tlbsize;
- __u8 x86_virt_bits;
- __u8 x86_phys_bits;
#endif
+ u8 x86_virt_bits;
+ u8 x86_phys_bits;
/* CPUID returned core id bits: */
__u8 x86_coreid_bits;
/* Max extended CPUID function supported: */
--
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