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Message-Id: <1222290917.8277.83.camel@pasglop>
Date: Thu, 25 Sep 2008 07:15:17 +1000
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Sebastien Dugue <sebastien.dugue@...l.net>
Cc: Milton Miller <miltonm@....com>,
Jan-Bernd Themann <ossthema@...ibm.com>,
Christoph Raisch <RAISCH@...ibm.com>,
Paul Mackerras <paulus@...ba.org>, linuxppc-dev@...abs.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH HACK] powerpc: quick hack to get a functional eHEA with
hardirq preemption
On Wed, 2008-09-24 at 14:35 +0200, Sebastien Dugue wrote:
> Hi Ben,
>
> On Wed, 24 Sep 2008 20:17:47 +1000 Benjamin Herrenschmidt <benh@...nel.crashing.org> wrote:
>
> > On Wed, 2008-09-24 at 04:58 -0500, Milton Miller wrote:
> > > The per-interrupt mask and unmask calls have to go through RTAS, a
> > > single-threaded global context, which in addition to increasing
> > > path length will really limit scalability. The interrupt controller
> > > poll and reject facilities are accessed through hypervisor calls
> > > which are comparable to a fast syscall, and parallel to all cpus.
> >
> > Note also that the XICS code thus assumes, iirc, as does the cell IIC
> > code, that eoi is called on the -same- cpu that fetched the interrupt
> > initially. That assumption can be broken with IRQ threads no ?
>
> No, the fetch and the eoi are both done in interrupt context before
> the hardirq thread is woken up.
>
> On the other hand, the mask+eoi and the unmask may well happen
> on different cpus as there's only one hardirq thread per irq on
> the system. Don't know if this is a problem with the XICS though.
Ok, that's the right approach then. It should work. I don't know what
the specific problems with HEA are at this stage. It doesn't seem to
make sense to implement a set_irq_type(), what would it do ? The
XICS doesn't expose any concept of interrupt type...
Ben.
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