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Message-ID: <df9815e70810152330h7886c77arb01e1fd308b4a7ae@mail.gmail.com>
Date: Thu, 16 Oct 2008 14:30:25 +0800
From: "Jike Song" <albcamus@...il.com>
To: gcosta@...hat.com
Cc: linux-kernel@...r.kernel.org, hpa@...or.com
Subject: questions about rd{msr|tsc|pmc} instruction with x86-64
Hi experts,
commit c210d24986dc19e387c10508c0bc2faadadc1a2e introduced such codes
and comments in include/asm-x86/msr.h:
/*
* i386 calling convention returns 64-bit value in edx:eax, while
* x86_64 returns at rax. Also, the "A" constraint does not really
* mean rdx:rax in x86_64, so we need specialized behaviour for each
* architecture
*/
#ifdef CONFIG_X86_64
#define DECLARE_ARGS(val, low, high) unsigned low, high
#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
#else
#define DECLARE_ARGS(val, low, high) unsigned long long val
#define EAX_EDX_VAL(val, low, high) (val)
#define EAX_EDX_ARGS(val, low, high) "A" (val)
#define EAX_EDX_RET(val, low, high) "=A" (val)
#endif
By my reading of Intel & AMD manuals, this comment is wrong. rdmsr of
x86-64 has the same behavior as i386, namely the high 32bit returns in
edx and the low 32bit in eax, not "returns at rax". And the gcc
constraint "A" does mean edx:eax in x86-64 also, at least when testing
on my AMD Turion 64 processor.
So the question is, do we really need these macros? Why a single "A"
won't work? Or do I have anything misunderstood?
--
Thanks,
Jike
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