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Message-ID: <alpine.LFD.1.10.0810221643250.24509@ftp.linux-mips.org>
Date:	Wed, 22 Oct 2008 16:52:40 +0100 (BST)
From:	"Maciej W. Rozycki" <macro@...ux-mips.org>
To:	Ingo Molnar <mingo@...e.hu>
cc:	Cyrill Gorcunov <gorcunov@...il.com>,
	Glauber Costa <glommer@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Max Kellermann <mk@...all.com>
Subject: Re: [PATCH -tip] x86: do_boot_cpu - check if we have ESR register

On Wed, 22 Oct 2008, Ingo Molnar wrote:

> ah, Compaq - how many CPUs does that box support? If it's 8 or more then 
> perhaps they turned off the real local APIC, fudged some chipset glue to 
> emulate APIC functionality and thus were able to use 8 or more of these 
> chips? The built-in lapic would only go up to 4 CPUs. (or maybe even 
> just up to dual, depending on the model)

 Hmm, interesting.  The integrated APIC should support up to 14 CPUs 
(assuming one ID is needed for the I/O APIC).  One cannot preclude silicon 
errata affecting the less common hardware configurations though.  It would 
be interesting to see a full bootstrap log with all the APIC debug 
information enabled.  That would probably clarify matters a bit.

 Note that Compaq would have to come with their own solution about the 
discrete APIC as the 82489DX went out of production many years ago -- ten 
at the very least.  OTOH, they could have stockpiled them back then. ;)  
This is one of the few manufacturers I would actually suspect doing so as 
they always seemed keen on going SMP.  Good to know we can support these 
boxes at all these days.

> This reminds us that all the is-integrated-lapic checks still matter 
> today.

 Quite surprising indeed.

  Maciej
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