[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20081022225409.GB27492@one.firstfloor.org>
Date: Thu, 23 Oct 2008 00:54:09 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Alok Kataria <akataria@...are.com>
Cc: Andi Kleen <andi@...stfloor.org>, Ingo Molnar <mingo@...e.hu>,
"H. Peter Anvin" <hpa@...or.com>,
LKML <linux-kernel@...r.kernel.org>,
the arch/x86 maintainers <x86@...nel.org>,
Daniel Hecht <dhecht@...are.com>
Subject: Re: [PATCH] Skip tsc synchronization checks if CONSTANT_TSC bit is set.
> Not really, there are problems with the pm timer too, the one about
> missing the counter wrap and time dropping in chunks of 4 seconds.
> Tried to explain it over here, http://lkml.org/lkml/2008/10/22/525
Well then pit. Or are you saying time is always broken on VMware & Linux?
> So TSC is the ideal clocksource from performance and correctness point
> of view for VMware.
But you don't seem to emulate it "ideal"ly otherwise you wouldn't
need all these hacks you're adding?
I think you should either implement a TSC that matches what
real hardware does (including CPUID semantics) or implement
a real vmware PV timer and just say it's PV and not fully virtualized.
But doesn't the vmware paravirt ops have that already anyways?
But I personally think it wouldn't really scale to add detection for
more and more "nearly PV" hypervisors to the standard native kernel.
-Andi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists