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Date:	Thu, 30 Oct 2008 23:40:57 +0100
From:	Ingo Molnar <mingo@...e.hu>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	James Bottomley <James.Bottomley@...senPartnership.com>,
	Alexey Dobriyan <adobriyan@...il.com>,
	Stephen Rothwell <sfr@...b.auug.org.au>,
	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Thomas Gleixner <tglx@...utronix.de>,
	Yinghai Lu <yinghai@...nel.org>
Subject: Re: next-20081030: voyager compile busted


* H. Peter Anvin <hpa@...or.com> wrote:

> James Bottomley wrote:
> > 
> > Yes ... been having IRC conversations about that.  We'd need to use
> > runtime patching to fix the performance regressions virtualisation has
> > been causing us first ... but then we could use it for voyager.
> 
> I thought we already were, at least to some degree (the call sites 
> are way too big and way bigger than they need to be, so we end up 
> with a lot of NOPs.  I proposed a solution to Jeremy at Kernel 
> Summit, but he basically said "I don't want to maintain that, I 
> don't care about hardware performance", which is understandable but 
> highly unfortunate.)

in practice the function pointer overhead is almost unmeasurable for 
things like IPIs which are rather expensive to issue. In fact it's 
probably more expensive on Voyager as it does not utilize the local 
APIC for SMP messaging (which is pretty much the only 
performance-sensitive thing here). It uses its own glue logic it 
appears, which is almost certainly behind the system bus.

James, how many cycles do typical SMP ops take on Voyager?

	Ingo
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