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Message-ID: <8bd0f97a0811051036w32717036k337f3ce1b3194198@mail.gmail.com>
Date:	Wed, 5 Nov 2008 13:36:56 -0500
From:	"Mike Frysinger" <vapier.adi@...il.com>
To:	"Hans J. Koch" <hjk@...utronix.de>
Cc:	"Greg KH" <gregkh@...e.de>, "Mike Frysinger" <vapier@...too.org>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] UIO: only call pgprot_noncached if defined

On Wed, Nov 5, 2008 at 13:27, Hans J. Koch wrote:
> On Wed, Nov 05, 2008 at 12:33:37PM -0500, Mike Frysinger wrote:
>> On Wed, Nov 5, 2008 at 11:33, Greg KH wrote:
>> > On Wed, Nov 05, 2008 at 12:36:11PM +0100, Hans J. Koch wrote:
>> >> There seem to be archs that cannot easily implement a sensible
>> >> pgprot_noncached() function, so we should merge this patch. UIO doesn't
>> >> compile on these archs right now.
>> >
>> > No, we should fix those arches to have that function at least NULLed
>> > out.  Isn't there only one, Blackfin?  Putting #ifdefs in .c files is
>> > not something we really want to do if at all possible.
>>
>> that was my question.  this function isnt documented.  if the hardware
>> doesnt support it, is the right thing really for the arch to lie to
>> drivers and not actually give back cached settings even though it
>> asked for non-cached ?
>
> Well, if there's no possibility to map device memory in a non-cached
> way, it's very likely you don't want to use UIO at all. If there's a few
> seconds between a write and the value actually appearing in the hardware
> register, you will certainly don't see the results you expect.
>
> If Blackfin can't mmap non-cached memory, we should make UIO depend on
> !BLACKFIN.

if it wasnt usable on the Blackfin arch, i wouldnt have been looking
at it in the first place.  there is some usage where merely hooking up
an interrupt is the only thing that is needed by userspace.

the only memory regions where a device would be hooked up are never
marked as cachable.  so if this function is only for mapping addresses
where device registers would live, then a stub pgprot_noncached()
would be fine.  but we cant do non-cached access on external memory
(e.g. SDRAM / DDR) if the device wanted coherent memory for dma.
-mike
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