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Message-ID: <20081107212723.GB2654@Krystal>
Date: Fri, 7 Nov 2008 16:27:23 -0500
From: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
To: Steven Rostedt <rostedt@...dmis.org>
Cc: David Howells <dhowells@...hat.com>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
akpm@...ux-foundation.org, Ingo Molnar <mingo@...e.hu>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
linux-kernel@...r.kernel.org, Nicolas Pitre <nico@....org>,
Ralf Baechle <ralf@...ux-mips.org>, benh@...nel.crashing.org,
paulus@...ba.org, David Miller <davem@...emloft.net>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
linux-arch@...r.kernel.org
Subject: Re: [RFC patch 08/18] cnt32_to_63 should use smp_rmb()
* Steven Rostedt (rostedt@...dmis.org) wrote:
>
> On Fri, 7 Nov 2008, Mathieu Desnoyers wrote:
> >
> > I want to make sure
> >
> > __m_cnt_hi
> > is read before
> > mmio cnt_lo read
>
> Hmm, let me make sure I understand why there is no wmb.
>
> Paul, can you verify this?
>
> Mathieu, you do the following:
>
> read a
> smp_rmb
> reab b
> if (test b)
> write a
>
> So the idea is that you must read b to test it. And since we must read a
> before reading b we can see that we write a before either?
>
> The question remains, can the write happen before either of the reads?
>
write a cannot happen before read a (same variable).
write a must happen after read b because it depends on the b value. It
makes sure the the side-effect of "write a" is seen by other CPUs
*after* we have read the b value.
> But since the read b is reading the hw clock, perhaps that just implies a
> wmb on the hardware side?
>
It makes sense. The hardware clock has no cache coherency problem.. so
it could be seen as doing wmb() after each data update.
Mathieu
> -- Steve
--
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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