linux-kernel - Re: [PATCH] [AGP] intel_agp: add support for G41 chipset

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Message-ID: <20081117063900.GB17066@zhen-devel.sh.intel.com>
Date:	Mon, 17 Nov 2008 14:39:00 +0800
From:	Zhenyu Wang <zhenyu.z.wang@...el.com>
To:	Dave Airlie <airlied@...hat.com>, Eric Anholt <eric@...olt.net>
Cc:	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] [AGP] intel_agp: add support for G41 chipset

On 2008.09.11 15:53:03 +0800, Zhenyu Wang wrote:
> 
> [PATCH] [AGP] intel_agp: add support for G41 chipset
> 
> G41 is another one of Intel 4 series chipset, like G45/G43.
> 

Dave, here's refreshed G41 pci ids patch for AGP.

From 1ab01c662f2607f5aa77c104edc710286f3feef7 Mon Sep 17 00:00:00 2001
From: Zhenyu Wang <zhenyu.z.wang@...el.com>
Date: Mon, 17 Nov 2008 14:33:45 +0800
Subject: [PATCH] [AGP] intel_agp: add support for G41 chipset

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@...el.com>
---
 drivers/char/agp/intel-agp.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 9cf6e9b..7d8db5a 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -40,6 +40,8 @@
 #define PCI_DEVICE_ID_INTEL_Q45_IG          0x2E12
 #define PCI_DEVICE_ID_INTEL_G45_HB          0x2E20
 #define PCI_DEVICE_ID_INTEL_G45_IG          0x2E22
+#define PCI_DEVICE_ID_INTEL_G41_HB          0x2E30
+#define PCI_DEVICE_ID_INTEL_G41_IG          0x2E32
 
 /* cover 915 and 945 variants */
 #define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -63,7 +65,8 @@
 #define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
-		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB)
+		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
+		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB)
 
 extern int agp_memory_reserved;
 
@@ -1196,6 +1199,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
 	case PCI_DEVICE_ID_INTEL_IGD_E_HB:
 	case PCI_DEVICE_ID_INTEL_Q45_HB:
 	case PCI_DEVICE_ID_INTEL_G45_HB:
+	case PCI_DEVICE_ID_INTEL_G41_HB:
 		*gtt_offset = *gtt_size = MB(2);
 		break;
 	default:
@@ -2163,6 +2167,8 @@ static const struct intel_driver_description {
 	    "Q45/Q43", NULL, &intel_i965_driver },
 	{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
 	    "G45/G43", NULL, &intel_i965_driver },
+	{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
+	    "G41", NULL, &intel_i965_driver },
 	{ 0, 0, 0, NULL, NULL, NULL }
 };
 
@@ -2360,6 +2366,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
 	ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
 	ID(PCI_DEVICE_ID_INTEL_Q45_HB),
 	ID(PCI_DEVICE_ID_INTEL_G45_HB),
+	ID(PCI_DEVICE_ID_INTEL_G41_HB),
 	{ }
 };
 
-- 
1.5.6.5


-- 
Open Source Technology Center, Intel ltd.

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