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Message-Id: <6F2B69F5-7312-49AB-B86A-6AE6B753095B@freescale.com>
Date:	Tue, 18 Nov 2008 09:20:10 -0600
From:	Kumar Gala <kumar.gala@...escale.com>
To:	linux-kernel Kernel <linux-kernel@...r.kernel.org>
Subject: questions on how x86 uses IPI for tlb invalidates

I'm looking at adding some code into powerpc for doing tlb invalidate  
broadcasts via IPI and am looking at the x86 code as a model.  I was  
wondering how the x86 code ensures we aren't interrupted in the  
process of doing something like flush_tlb_page().

- k
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