linux-kernel - Re: [PATCH 2/5] Blackfin arch: SMP supporting patchset: Blackfin header files and machine common code

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Message-ID: <386072610811190020w619e5623p8fe2caf3373f8012@mail.gmail.com>
Date:	Wed, 19 Nov 2008 16:20:07 +0800
From:	"Bryan Wu" <cooloney@...nel.org>
To:	gyang <graf.yang@...log.com>
Cc:	"Andrew Morton" <akpm@...ux-foundation.org>,
	torvalds@...ux-foundation.org, mingo@...e.hu,
	LKML <linux-kernel@...r.kernel.org>, linux-arch@...r.kernel.org
Subject: Re: [PATCH 2/5] Blackfin arch: SMP supporting patchset: Blackfin header files and machine common code

On Wed, Nov 19, 2008 at 3:52 PM, gyang <graf.yang@...log.com> wrote:
>
> 在 2008-11-18二的 22:56 -0800，Andrew Morton写道：
>> On Tue, 18 Nov 2008 17:05:05 +0800 Bryan Wu <cooloney@...nel.org> wrote:
>>
>> > From: Graf Yang <graf.yang@...log.com>
>> >
>> > Blackfin dual core BF561 processor can support SMP like features.
>> > https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like
>> >
>> > In this patch, we provide SMP extend to Blackfin header files
>> > and machine common code
>> >
>> >
>> > ...
>> >
>> > +#define atomic_add_unless(v, a, u)                         \
>> > +({                                                         \
>> > +   int c, old;                                             \
>> > +   c = atomic_read(v);                                     \
>> > +   while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
>> > +           c = old;                                        \
>> > +   c != (u);                                               \
>> > +})
>>
>> The macro references its args multiple times and will do weird or
>> inefficient things when called with expressions which have
>> side-effects, or which do slow things.
>>
>> >
>> > ...
>> >
>> > +#include <asm/system.h>            /* save_flags */
>> > +
>> > +static inline void set_bit(int nr, volatile unsigned long *addr)
>> >  {
>> >     int *a = (int *)addr;
>> >     int mask;
>> > @@ -57,21 +91,23 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
>> >     a += nr >> 5;
>> >     mask = 1 << (nr & 0x1f);
>> >     local_irq_save(flags);
>> > -   *a &= ~mask;
>> > +   *a |= mask;
>>
>> I think you just broke clear_bit().  Maybe I'm misreading the diff.
> OK, We have corrected it on our own tree.

Both the code and the patch are all right. Because the mess from diff,
we all misread it.

-Bryan

>>
>> >     local_irq_restore(flags);
>> >  }
>> >
>> >
>> > ...
>> >
>> > +#define smp_mb__before_clear_bit() barrier()
>> > +#define smp_mb__after_clear_bit()  barrier()
>> > +
>> > +static inline void __set_bit(int nr, volatile unsigned long *addr)
>> > +{
>> > +   int *a = (int *)addr;
>> > +   int mask;
>> > +
>> > +   a += nr >> 5;
>> > +   mask = 1 << (nr & 0x1f);
>> > +   *a |= mask;
>> > +}
>> > +
>> > +static inline void __clear_bit(int nr, volatile unsigned long *addr)
>> > +{
>> > +   int *a = (int *)addr;
>> > +   int mask;
>> > +
>> > +   a += nr >> 5;
>> > +   mask = 1 << (nr & 0x1f);
>> > +   *a &= ~mask;
>> > +}
>> > +
>> > +static inline void __change_bit(int nr, volatile unsigned long *addr)
>> > +{
>> > +   int mask;
>> > +   unsigned long *ADDR = (unsigned long *)addr;
>> > +
>> > +   ADDR += nr >> 5;
>> > +   mask = 1 << (nr & 31);
>> > +   *ADDR ^= mask;
>> > +}
>>
>> I'm surprised there isn't any generic code which can be used for the above.
>>
>> >
>> > ...
>> >
>>
>> Gad what a lot of code.  I don't think I have time to read it all, sorry.
>
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