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Message-ID: <b647ffbd0811200428u2b41b108ifb02872563c871ab@mail.gmail.com>
Date: Thu, 20 Nov 2008 13:28:03 +0100
From: "Dmitry Adamushko" <dmitry.adamushko@...il.com>
To: "Nick Piggin" <nickpiggin@...oo.com.au>
Cc: "Russell King - ARM Linux" <linux@....linux.org.uk>,
linux-fsdevel@...r.kernel.org,
"Naval Saini" <navalnovel@...il.com>, linux-arch@...r.kernel.org,
linux-arm-kernel@...ts.arm.linux.org.uk,
linux-kernel@...r.kernel.org, naval.saini@....com,
"Ralf Baechle" <ralf@...ux-mips.org>
Subject: Re: O_DIRECT patch for processors with VIPT cache for mainline kernel (specifically arm in our case)
2008/11/20 Nick Piggin <nickpiggin@...oo.com.au>:
>
> [ ... ]
>
> - The page is sent to the block layer, which stores into the page. Some
> block devices like 'brd' will potentially store via the kernel linear map
> here, and they probably don't do enough cache flushing.
btw., if someone is curious, here is another case of what may happen
on VIPT systems when someone uses a "virtual" block device (like
'brd') as, heh, a swap :-)
http://www.linux-mips.org/archives/linux-mips/2008-11/msg00038.html
--
Best regards,
Dmitry Adamushko
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