linux-kernel - Re: [patch] Performance Counters for Linux, v2

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Message-ID: <18750.63619.54374.976070@cargo.ozlabs.ibm.com>
Date:	Wed, 10 Dec 2008 10:00:19 +1100
From:	Paul Mackerras <paulus@...ba.org>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
	linux-arch@...r.kernel.org,
	Andrew Morton <akpm@...ux-foundation.org>,
	Stephane Eranian <eranian@...glemail.com>,
	Eric Dumazet <dada1@...mosbay.com>,
	Robert Richter <robert.richter@....com>,
	Arjan van de Veen <arjan@...radead.org>,
	Peter Anvin <hpa@...or.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Steven Rostedt <rostedt@...dmis.org>,
	David Miller <davem@...emloft.net>
Subject: Re: [patch] Performance Counters for Linux, v2

Ingo Molnar writes:

> * Paul Mackerras <paulus@...ba.org> wrote:
> 
> > > Things like: "kerneltop would not be as accurate with: ..., to the 
> > > level of adding 5% of extra noise.". Would that work for you?
> > 
> > OK, here's an example.  I have an application whose execution has 
> > several different phases, and I want to measure the L1 Icache hit rate 
> > and the L1 Dcache hit rate as a function of time and make a graph.  So 
> > I need counters for L1 Icache accesses, L1 Icache misses, L1 Dcache 
> > accesses, and L1 Dcache misses.  I want to sample at 1ms intervals. The 
> > CPU I'm running on has two counters.
> > 
> > With your current proposal, I don't see any way to make sure that the 
> > counter scheduler counts L1 Dcache accesses and L1 Dcache misses at the 
> > same time, then schedules L1 Icache accesses and L1 Icache misses.  I 
> > could end up with L1 Dcache accesses and L1 Icache accesses, then L1 
> > Dcache misses and L1 Icache misses - and get a nonsensical situation 
> > like the misses being greater than the accesses.
> 
> yes, agreed, this is a valid special case of simple counter readout - 
> we'll add support to couple counters like that.

This is an example of a sampling problem, but one where the thing
being sampled is a derived statistic from two counter values.

I don't agree that this is really a "special case".  There are lots of
derived statistics that are interesting for performance analysis,
starting with CPI (cycles per instruction), proportions of various
instructions in the code, cache hit/miss rates for various different
caches, etc., etc.

> Note that this issue does not impact use of multiple counters in 
> profilers. (i.e. anything that is not a pure readout of the counter, 
> along linear time, as your example above suggests).

Well, that's the sampling vs. counting distinction that I made in my
other email.  We need to do both well.

As far as I can see, my "counter set" proposal does everything yours
does (since a counter set can be just a single counter), and also
cleanly accommodates what's needed for counting and for sampling
derived statistics.  No?

Paul.
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