linux-kernel - Re: [RFC PATCH crypto] AES: Add support to Intel AES-NI instructions

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Message-Id: <1229320131.5936.232.camel@yhuang-dev.sh.intel.com>
Date:	Mon, 15 Dec 2008 13:48:51 +0800
From:	Huang Ying <ying.huang@...el.com>
To:	Herbert Xu <herbert@...dor.apana.org.au>
Cc:	"Siddha, Suresh B" <suresh.b.siddha@...el.com>,
	Sebastian Andrzej Siewior <linux-crypto@...breakpoint.cc>,
	"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
	"mingo@...e.hu" <mingo@...e.hu>,
	"tglx@...utronix.de" <tglx@...utronix.de>
Subject: Re: [RFC PATCH crypto] AES: Add support to Intel
	AES-NI	instructions

On Mon, 2008-12-15 at 13:21 +0800, Herbert Xu wrote:
> On Mon, Dec 15, 2008 at 01:14:59PM +0800, Huang Ying wrote:
> > 
> > The PadLock instructions don't use/touch SSE registers, but might cause
> > DNA fault when CR0.TS is set. So it is sufficient just to clear CR0.TS
> > before executed.
> > 
> > The AES-NI instructions do use SSE registers. Considering the following
> 
> This really sucks as more than half of the kernel AES users are
> in softirq context.  Someone hit the guy who designed this with
> a clue-bat please!
> 
> > To solve the above issue, the following methods can be used:
> > 
> > a. Do not touch SSE state in soft_irq
> > b. Disable/restore soft_irq in kernel_fpu_begin/kernel_fpu_end
> > c. Use a per-CPU data structure to save kernel FPU state during
> > soft_irq.
> > 
> > The mothod a is used in patch.
> 
> Could you run the tcrypt speed test on this and measure the
> difference between the native AES vs. the fallback? Depending
> on the difference I think we'd want to consider b) or c).

I do not have appropriate machine at hand, I will contact my colleague
for testing and post the results later.

Best Regards,
Huang Ying


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