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Message-ID: <20081217091845.GC25779@one.firstfloor.org>
Date:	Wed, 17 Dec 2008 10:18:45 +0100
From:	Andi Kleen <andi@...stfloor.org>
To:	Nils Smeds <nils.smeds@...il.com>
Cc:	Samuel Thibault <samuel.thibault@...-lyon.org>,
	Andi Kleen <andi@...stfloor.org>,
	William Cohen <wcohen@...hat.com>, Ingo Molnar <mingo@...e.hu>,
	linux-kernel@...r.kernel.org,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	"David S. Miller" <davem@...emloft.net>,
	Robert Richter <robert.richter@....com>,
	Eric Dumazet <dada1@...mosbay.com>,
	Stephane Eranian <eranian@...glemail.com>,
	Paul Mackerras <paulus@...ba.org>, Peter Anvin <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	perfctr-devel@...ts.sourceforge.net,
	Arjan van de Ven <arjan@...radead.org>
Subject: Re: [Perfctr-devel] [patch] Performance Counters for Linux, v4

> To make life easier for developers not interested in exact measuring, but in
> cross-platform development, PAPI has introduced "generic" events. These are
> documented not to be interpretable in a cross-platform manner - and
> typically consist of aggregation of a number of low-level architecture
> specific events. Instead a measure as PERF_COUNT_CACHE_REFERENCES tries to
> create an event set that is a "best effort" for the platform. Typically it
> would try to count read and write events to L1 and L2, but depending on the

The point was that L1 and L2/L3 behave so differently in practice
due to their latency/bandwidth differences (typically L1 is more like a 
slower register file while L3 is more like faster DRAM) that it's unclear
that any generic event not defining what it means is any useful.

I could see the point of generic FLC/LLC cache events perhaps,
but not of a single one lumping these two together.

But although with multi core it looks like 3 level hierarchies are
becoming more and more common and also more important to know
about.

-Andi

-- 
ak@...ux.intel.com
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