linux-kernel - Re: [Perfctr-devel] [patch] Performance Counters for Linux, v4

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Message-ID: <20081217150647.GE25779@one.firstfloor.org>
Date:	Wed, 17 Dec 2008 16:06:47 +0100
From:	Andi Kleen <andi@...stfloor.org>
To:	Nils Smeds <nils.smeds@...il.com>
Cc:	Andi Kleen <andi@...stfloor.org>,
	Samuel Thibault <samuel.thibault@...-lyon.org>,
	William Cohen <wcohen@...hat.com>, Ingo Molnar <mingo@...e.hu>,
	linux-kernel@...r.kernel.org,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	"David S. Miller" <davem@...emloft.net>,
	Robert Richter <robert.richter@....com>,
	Eric Dumazet <dada1@...mosbay.com>,
	Stephane Eranian <eranian@...glemail.com>,
	Paul Mackerras <paulus@...ba.org>, Peter Anvin <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	perfctr-devel@...ts.sourceforge.net,
	Arjan van de Ven <arjan@...radead.org>
Subject: Re: [Perfctr-devel] [patch] Performance Counters for Linux, v4

> OK, now I see where I got the understanding of this thread.
> PERF_COUNT_CACHE_REFERENCES did not refer to a PAPI event. My error.

Ok that makes sense. 

> A suggested kernel/user API that obscures the underlying PMU hardware
> counters instead of exposing it to user level code should be dropped as

It doesn't really obscure it (although there are some doubts it can
express many of the more powerful/complicated features of modern PMUs),
but provides a set of generalized standard events in addition, plus
a "raw mode". The current list of events as of v4 is:

+       PERF_COUNT_CYCLES               =  0,
+       PERF_COUNT_INSTRUCTIONS         =  1,
+       PERF_COUNT_CACHE_REFERENCES     =  2,
+       PERF_COUNT_CACHE_MISSES         =  3,
+       PERF_COUNT_BRANCH_INSTRUCTIONS  =  4,
+       PERF_COUNT_BRANCH_MISSES        =  5,

I think cache_references/misses is not well defined enough to be useful.

The Intel architectural perfmon (which is a standard set of event
supported over a range of Intel x86 micro architectures) has similar
events defined as hitting the LLC (last level cache). With that
it makes some sense.

-Andi

-- 
ak@...ux.intel.com
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