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Message-ID: <20090113021459.GB20594@localdomain>
Date: Mon, 12 Jan 2009 18:14:59 -0800
From: Ravikiran G Thirumalai <kiran@...lex86.org>
To: Ingo Molnar <mingo@...e.hu>
Cc: Frederik Deweerdt <frederik.deweerdt@...og.eu>,
andi@...stfloor.org, tglx@...utronix.de, hpa@...or.com,
linux-kernel@...r.kernel.org
Subject: Re: [patch] tlb flush_data: replace per_cpu with an array
On Tue, Jan 13, 2009 at 12:00:52AM +0100, Ingo Molnar wrote:
>
>
>> With per-cpu areas, locks belonging to different array elements did not
>> end up on the same internode cacheline due to per-node allocation of
>> per-cpu areas, but with a simple array, two locks could end up on the
>> same internode cacheline.
>>
>> Hence, can you please change the padding in smp_flush_state to
>> INTERNODE_CACHE_BYTES (you have to derive this off
>> INTERNODE_CACHE_SHIFT) and align it using
>> ____cacheline_internodealigned_in_smp?
>
>Yes, that matters to vsmp, which has ... 4K node cache-lines.
>
>Note that there's already CONFIG_X86_INTERNODE_CACHE_BYTES which is set
>properly on vsmp.
>
>So ... something like the commit below?
>
Yep. Looks good!
Acked-by: Ravikiran Thirumalai <kiran@...lex86.org>
Thanks,
Kiran
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