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Message-Id: <1231957184.13033.70.camel@thinkpad>
Date: Wed, 14 Jan 2009 18:19:44 +0000
From: Tim Blechmann <tim@...ngt.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Andi Kleen <ak@...ux.intel.com>, oprofile-list@...ts.sf.net,
linux-kernel@...r.kernel.org,
Robert Richter <robert.richter@....com>,
venkatesh.pallipadi@...el.com
Subject: Re: 2.6.28-rc9: oprofile regression
On Wed, 2009-01-14 at 18:10 +0100, Thomas Gleixner wrote:
> On Fri, 2 Jan 2009, Tim Blechmann wrote:
> > On Fri, 2008-12-26 at 03:42 +0100, Andi Kleen wrote:
> > > Tim Blechmann wrote:
> > > >> i am experiencing an issue, similar to the one reported in
> > > >> http://lkml.org/lkml/2008/10/30/319.
> > > >
> > > > bisecting showed, that commit b99170288421c79f0c2efa8b33e26e65f4bb7fb8
> > > > (oprofile: Implement Intel architectural perfmon support) caused the
> > > > problem.
> > > > oddly, the newly introduced api is not used, since the model struct is
> > > > set during the ppro_init call ...
> > >
> > > We're still investigating the problem. Thanks for the report.
> >
> > btw, this issue still exists in tip/oprofile ... not sure, whether this
> > may be related, but i am running the machine in 64-bit mode ...
>
> can you please apply the patch below and provide the output ?
[29030.863352] oprofile: using NMI interrupt.
[29051.826778] ppro counter_width: 40
[29051.826783] ppro counter_width: 40
> That's one of the subtle differences to the 2.6.27 code, where the
> counter width is fixed to 32bit, which is correct anyway as the
> counter MSRs can only write the lower 32bits and sign extend bit 31
> according to intel documentation.
this code (line 81/82), changes counter_width from 32 to 40.
if (counter_width < eax.split.bit_width)
counter_width = eax.split.bit_width;
however when removing these lines, and thus keeping the value 32 for
counter_width, doesn't change the behavior, only one NMI per cpu.
best, tim
--
tim@...ngt.org
http://tim.klingt.org
It is better to make a piece of music than to perform one, better to
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John Cage
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