linux-kernel - Re: [PATCH 5/8] PCI PCIe portdrv: Fix allocation of interrupts

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <496F1078.5040904@jp.fujitsu.com>
Date:	Thu, 15 Jan 2009 19:31:20 +0900
From:	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
CC:	"Rafael J. Wysocki" <rjw@...k.pl>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Linux PCI <linux-pci@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/8] PCI PCIe portdrv: Fix allocation of interrupts

Hidetoshi Seto wrote:
> Rafael J. Wysocki wrote:
>> On Wednesday 14 January 2009, Rafael J. Wysocki wrote:
>>> On Wednesday 14 January 2009, Kenji Kaneshige wrote:
>> [...]
>>>> I'm sorry but I don't understand what the problem is.
>>>> Do you mean pci_disable_msix() doesn't work on some platforms?
>>> No, I don't.  It was just confusion on my side, sorry.
>>>
>>> Please have a look at the new version of the patch I sent yesterday
>>> (http://marc.info/?l=linux-pci&m=123185510828181&w=4).
>> BTW, in your patch the first dummy pci_enable_msix() allocates just one
>> vector, which means that the contents of both
>> msix_entries[idx_hppme].entry and msix_entries[idx_aer].entry will be the same,
>> if my reading of the spec (PCI 3.0 in this case) is correct.
> 
> According to PCI 3.0 implementation note "Handling MSI-X Vector Shortage,"
> it seems your reading is not correct.
> 
> Assume that the port have 4 entries([0-3]) in MSI-X table, and that entry[2]
> for hotplug/PME and entry[3] for AER, and that kernel only allocates 2 vector.
> Spec says that the port could be designed for software to configure entries
> assigning vectors{A,B} to multiple entries as ABAB, AABB, ABBB etc. 
> 
> So if there is just one vector, it could be AAAA.
> 

BTW, I don't think pci_enable_msix() allows this kind of configuration.
With the dummy pci_enable_msix() in my patch, it would be A---, I think.

Thanks,
Kenji Kaneshige


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/