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Message-ID: <20090121072718.GN24891@wotan.suse.de>
Date: Wed, 21 Jan 2009 08:27:18 +0100
From: Nick Piggin <npiggin@...e.de>
To: Ingo Molnar <mingo@...e.hu>
Cc: Jeremy Fitzhardinge <jeremy@...p.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>, hpa@...or.com,
jeremy@...source.com, chrisw@...s-sol.org, zach@...are.com,
rusty@...tcorp.com.au, Andrew Morton <akpm@...ux-foundation.org>,
Xen-devel <xen-devel@...ts.xensource.com>
Subject: Re: lmbench lat_mmap slowdown with CONFIG_PARAVIRT
On Tue, Jan 20, 2009 at 09:56:53PM +0100, Ingo Molnar wrote:
>
> * Jeremy Fitzhardinge <jeremy@...p.org> wrote:
> >> | 50234816 | 51303520 cache references +2.12%
> >> | 5428258 | 5583728 cache misses +2.86%
> >>
> >
> > Is this I or D, or combined?
>
> That's last-level-cache references+misses (L2 cache):
>
> Bit Position Event Name UMask Event Select
> CPUID.AH.EBX
> 3 LLC Reference 4FH 2EH
> 4 LLC Misses 41H 2EH
Oh, _llc_ references/misses? Ouch.
You have, what 32K L1I, 32K L1D, and 4MB L2? And even this microbenchmark
is seeing increased L2 misses by nearly 3%. Hmm, I wonder where that is
coming from? Instruction fetches?
It would be interesting to see how "the oltp" benchmark fares with
CONFIG_PARAVIRT turned on. That workload lives and dies by the cache :)
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