[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1232950532-22923-11-git-send-email-brgerst@gmail.com>
Date: Mon, 26 Jan 2009 01:15:31 -0500
From: Brian Gerst <brgerst@...il.com>
To: Ingo Molnar <mingo@...e.hu>
Cc: Tejun Heo <tj@...nel.org>, linux-kernel@...r.kernel.org
Subject: [PATCH 11/12] x86: Remove extra barriers from load_gs_base()
Impact: optimization
mb() generates an mfence instruction, which is not needed here. Only
a compiler barrier is needed, and that is handled by the memory clobber
in the wrmsrl function.
Signed-off-by: Brian Gerst <brgerst@...il.com>
---
arch/x86/include/asm/processor.h | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 32c30b0..794234e 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -397,10 +397,7 @@ DECLARE_PER_CPU(char *, irq_stack_ptr);
static inline void load_gs_base(int cpu)
{
- /* Memory clobbers used to order pda/percpu accesses */
- mb();
wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
- mb();
}
#endif
--
1.6.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists