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Message-ID: <498095F2.4060502@zytor.com>
Date: Wed, 28 Jan 2009 09:29:22 -0800
From: "H. Peter Anvin" <hpa@...or.com>
To: Kyle Moffett <kyle@...fetthome.net>
CC: Duncan Sands <baldrick@...e.fr>, llvmdev@...uiuc.edu,
Ingo Molnar <mingo@...e.hu>,
Török Edwin <edwintorok@...il.com>,
Thomas Gleixner <tglx@...utronix.de>,
Linux Kernel <linux-kernel@...r.kernel.org>
Subject: Re: [LLVMdev] inline asm semantics: output constraint width smaller
than input
Kyle Moffett wrote:
>
> Even in the 64-bit-integer on 32-bit-CPU case, you still end up with
> the lower 32-bits in a standard integer GPR, and it's trivial to just
> ignore the "upper" register. You also would not need to do any kind
> of bit-shift, so long as your inline assembly initializes both GPRs
> and puts the halves of the result where they belong.
>
In this case, we're talking about what happens when the assembly takes a
64-bit input operand in the same register as a 32-bit output operand
(with a "0" constraint.) Is the output operand the same register number
as the high register or the low register? On an LE machine the answer
is trivial and obvious -- the low register; on a BE machine both
interpretations are possible (I actually suspect gcc will assign the
high register, just based on how gcc internals work in this case.)
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
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