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Message-ID: <20090221151621.34125c6a@mjolnir.ossman.eu>
Date: Sat, 21 Feb 2009 15:16:21 +0100
From: Pierre Ossman <drzeus@...eus.cx>
To: Wolfgang Mües <wolfgang.mues@...rswald.de>
Cc: "Andrew Morton" <akpm@...ux-foundation.org>,
"Matt Fleming" <matt@...sole-pimps.org>,
"David Brownell" <dbrownell@...rs.sourceforge.net>,
linux-kernel@...r.kernel.org,
"Mike Frysinger" <vapier.adi@...il.com>
Subject: Re: [PATCH] Fixes and enhancements for the MMC SPI driver - revised
On Mon, 9 Feb 2009 12:53:57 +0100
Wolfgang Mües <wolfgang.mues@...rswald.de> wrote:
>
> Hmmm. Inside the core, this timeout value will be calculated as:
>
> timeout = 250ms;
> if (driver == SPI)
> timeout = 1s;
>
> I agree that it is confusing to have the timeout value set on two places.
> Do you prefer to have it set in the mmc core, different for SPI and non-SPI?
>
Yes please. With a comment though.
> > > - if (host->mmc->use_spi_crc) {
> > > + /*
> > > + * Omit the CRC check for CID and CSD reads. There are some SDHC
>
> > Hmmm... I think this also better handled in the core. Reorder things in
> > the init to not turn CRC checks on until after those registers have
> > been read.
>
> No! CRC checks are ONLY disabled for CID and CSD reads, NOT for the reading of
> data blocks. And I don't want to set use_spi_scc == 0 because I don't want to
> disable the safety of CRC for data blocks.
>
I said reorder, not remove. :)
I.e. move the call to mmc_spi_set_crc() to after the CID and CSD have
been read. Again with a comment explaining the issue.
Rgds
--
-- Pierre Ossman
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