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Message-ID: <20090305122157.GA7347@alberich.amd.com>
Date: Thu, 5 Mar 2009 13:21:57 +0100
From: Andreas Herrmann <andreas.herrmann3@....com>
To: Jaswinder Singh Rajput <jaswinder@...nel.org>
CC: Ingo Molnar <mingo@...e.hu>, "H. Peter Anvin" <hpa@...or.com>,
x86 maintainers <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [git-pull -tip V2] x86: msr architecture debug code
On Thu, Mar 05, 2009 at 02:19:56AM +0530, Jaswinder Singh Rajput wrote:
> On Thu, 2009-03-05 at 00:46 +0530, Jaswinder Singh Rajput wrote:
>
> > The following changes since commit 1d10914bf2c8a1164aef6c341e6c3518a91b8374:
> > Ingo Molnar (1):
> > Merge branch 'core/percpu'
> >
> > are available in the git repository at:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/jaswinder/linux-2.6-tip-cpu.git master
> >
> > Jaswinder Singh Rajput (1):
> > x86: msr architecture debug code
Hi,
Why do we need this in-kernel?
We have already access to MSRs via /dev/cpu/*/msr
Did you have a look at x86info. (see
http://www.codemonkey.org.uk/projects/x86info/)
Recent versions contain a tool called lsmsr -- which shows you MSRs
and also decodes some bits, e.g.
# lsmsr IntPendingMessage -V 3 -c 1
IntPendingMessage = 0x00000000082100b0
IOMsgAddr=0xb0
IOMsgData=0x21
IntrPndMsgDis=0
IntrPndMsg=0
IORd=0
SmiOnCmpHalt=0x1
C1eOnCmpHalt=0
The tool just lacks some detailed MSR definitions for non-AMD CPUs.
Feel free to add them ... (and to fix bugs if encountered ;-)
Of course I've applied your patch to do a sniff test and found the
following:
- I've just one directory in debugfs
x86/cpu/msr/cpu0
The system has a quad-core CPU. So I guess there should be 4
directories -- one for each core.
- The file showing MTRRs is misspelled (mttr instead of mtrr).
Regards,
Andreas
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