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Message-Id: <1236263487.2527.11.camel@ht.satnam>
Date: Thu, 05 Mar 2009 20:01:27 +0530
From: Jaswinder Singh Rajput <jaswinder@...nel.org>
To: Ingo Molnar <mingo@...e.hu>
Cc: Andreas Herrmann <andreas.herrmann3@....com>,
"H. Peter Anvin" <hpa@...or.com>, x86 maintainers <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [git-pull -tip V2] x86: msr architecture debug code
On Thu, 2009-03-05 at 15:11 +0100, Ingo Molnar wrote:
> * Jaswinder Singh Rajput <jaswinder@...nel.org> wrote:
>
> > On Thu, 2009-03-05 at 14:32 +0100, Ingo Molnar wrote:
> > > * Andreas Herrmann <andreas.herrmann3@....com> wrote:
> > >
> > > > - I've just one directory in debugfs
> > > > x86/cpu/msr/cpu0
> > > > The system has a quad-core CPU. So I guess there should be 4
> > > > directories -- one for each core.
> > >
> > > Correct, most MSRs are per core - that needs to be fixed.
> >
> > Ok I will support all cores in next Version.
>
> the VFS structure should be something like:
>
> /debug/x86/cpu/cpu0/msr/...
>
> I.e. first we have the CPU, then a specific CPU, and MSRs are
> attributes of that CPU (core).
>
I am also planning to add other CPU registers beside MSRs so msr will
differentiate that it is MSRs or normal register.
And we can move architecture independent code in kernel/* so that
another architectures will also take benefit from it.
--
JSR
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