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Message-ID: <49BD2FC7.5050903@goop.org>
Date: Sun, 15 Mar 2009 09:41:43 -0700
From: Jeremy Fitzhardinge <jeremy@...p.org>
To: Sergio Luis <eeeesti@...il.com>
CC: Ingo Molnar <mingo@...e.hu>, "Rafael J. Wysocki" <rjw@...k.pl>,
Pavel Machek <pavel@...e.cz>,
Linux-kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: x86: asm doubt
Sergio Luis wrote:
> Hi there,
>
> taking a look at arch/x86/power/cpu_(32|64).c, I saw the 32.c one
> using the following macros
>
> #define savesegment(seg, value) \
> asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
>
>
> #define loadsegment(seg, value) \
> asm volatile("\n" \
> "1:\t" \
> "movl %k0,%%" #seg "\n" \
> "2:\n" \
> ".section .fixup,\"ax\"\n" \
> "3:\t" \
> "movl %k1, %%" #seg "\n\t" \
> "jmp 2b\n" \
> ".previous\n" \
> _ASM_EXTABLE(1b,3b) \
> : :"r" (value), "r" (0) : "memory")
>
>
> saving and loading segment registers as in
>
> savesegment(es, ctxt->es);
> loadsegment(es, ctxt->es);
>
> the code in cpu_64.c doesn't make use of such macros, doing the following:
>
> saving:
> asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
>
> loading:
> asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
>
> So, my question is... what's the actual difference between both
> versions? Aren't the macros suitable for the 64 version as well?
>
In 32-bit mode, moving to a segment register can fault if the underlying
GDT/LDT entry is invalid. In 64-bit mode, segment registers are mostly
decorative and have no function, and moving arbitrary values into them
doesn't fault, making the exception catching unnecessary.
But it would be good to use the same syntax to load segment registers
for both architectures to help with unification.
J
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