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Message-ID: <20090317115912.3063a93b@hobbes.lan>
Date: Tue, 17 Mar 2009 11:59:12 -0700
From: Jesse Barnes <jbarnes@...tuousgeek.org>
To: Matthew Wilcox <matthew@....cx>
Cc: Jan Beulich <jbeulich@...ell.com>, linux-pci@...r.kernel.org,
Dexuan Cui <dexuan.cui@...el.com>, stable@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pci: Fix the definition of PCI_PM_CTRL_NO_SOFT_RESET
On Tue, 17 Mar 2009 11:38:45 -0600
Matthew Wilcox <matthew@....cx> wrote:
> On Tue, Mar 17, 2009 at 04:17:48PM +0000, Jan Beulich wrote:
> > From: Dexuan Cui <dexuan.cui@...el.com>
> >
> > As per PCI Bus Power Management Interface Specification Revision 1.2
> > this is bit 3, not bit 2, of the Power Management Control/Status
> > register.
>
> The same patch was already posted by Yu Zhao on February 25th and I
> reviewed it for Jesse. I don't see it in any of the trees yet
> though ... (arguably, I should have picked it up for the fixes tree
> that I did while Jesse was away).
Yeah I've got it in my queue but haven't pushed it yet. Thanks.
--
Jesse Barnes, Intel Open Source Technology Center
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