linux-kernel - RE: [PATCH 1/1] DaVinci: MMC: Updated MMC/SD controller driver for DaVinci family.

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Message-ID: <B85A65D85D7EB246BE421B3FB0FBB59301CC486460@dbde02.ent.ti.com>
Date:	Tue, 24 Mar 2009 17:27:27 +0530
From:	"Kumar, Purushotam" <purushotam@...com>
To:	David Brownell <david-b@...bell.net>
CC:	"davinci-linux-open-source@...ux.davincidsp.com" 
	<davinci-linux-open-source@...ux.davincidsp.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"drzeus-mmc@...eus.cx" <drzeus-mmc@...eus.cx>
Subject: RE: [PATCH 1/1] DaVinci: MMC: Updated MMC/SD controller driver for
 DaVinci family.



>  Acked-by: David Brownell <dbrownell@...rs.sourceforge.net>
> 
> Though the PIO bits still bother me ... I'd use *only* the
> io{read,write}8_rep() calls to load/unload the FIFO.  While
> those calls haven't broken yet, it's rude to (a) open-code
> io{read,write}32_rep() like that, and (b) assume all buffers
> coming in to that function are 32-bit aligned.  PIO is hardly
> ever used, given EDMA.  Maybe just one or two calls when
> enumerating.  (SDIO might use it more often.)  That can be
> fixed a bit later.
> 
> Also, it'd be good to submit a patch to the DaVinci tree
> to make it match whatever Pierre eventually merges.  (Less
> the clock name change, of course, which is only needed to
> cope with the elderly clock logic now in mainline.)

In my testing, I have observed that io{read,write}8_rep() does not work properly in pure PIO mode i.e. when use_dma is set 0. So, I have introduced both io{read,write}8_rep() and io{read,write}32_rep() and we could handle different size of buffers irrespective of whether it is multiple of 4 bytes or not.

> 
> Build bug in probe():
> 
> > +	host->clk = clk_get(&pdev->dev, MMCSDCLK);
> 
> Put quotes around "MMCSDCLK".

I will add quotes and re-submit patch today or tomorrow.
-Purushotam
 

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