linux-kernel - Re: [PATCH v4 0/6] PCI: support the ATS capability

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Message-ID: <20090330015646.GA10521@yzhao-otc.sh.intel.com>
Date:	Mon, 30 Mar 2009 09:56:46 +0800
From:	Yu Zhao <yu.zhao@...el.com>
To:	Matthew Wilcox <matthew@....cx>
Cc:	Jesse Barnes <jbarnes@...tuousgeek.org>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
	"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 0/6] PCI: support the ATS capability

On Sun, Mar 29, 2009 at 09:51:31PM +0800, Matthew Wilcox wrote:
> On Thu, Mar 26, 2009 at 04:15:56PM -0700, Jesse Barnes wrote:
> > >   2, avoid using pci_find_ext_capability every time when reading ATS
> > >      Invalidate Queue Depth (Matthew Wilcox)
> 
> I asked a question about how that was used, and got back a version which
> changed how it was done.  I still don't have an answer to my question.

VT-d hardware is designed as that the Invalidate Queue Depth is used
every time when the software prepares the Invalidate Request descriptor.
This happens when the device IOMMU mapping changes (i.e. device driver
calls DMA map/unmap if the device is use by the host; or when a guest
is started/destroyed if the device is assigned to this guest).

Given the DMA map/unmap are used very frequently, I suppose the queue
depth should be cached somewhere. And it used to be cached in the VT-d
private data structure (before v3) because I'm not sure about how the
IOMMU hardware from other vendors use the queue depth.

After you commented the code, I checked the AMD/IBM/Sun IOMMU: AMD IOMMU
also uses the invalidate queue for every Invalidate Request descriptor;
IBM/Sun IOMMUs don't look like supporting the ATS. So it's reasonable to
cache the queue depth in the PCI subsystem since all IOMMUs that support
the ATS use the queue depth in the same way (very frequently), right?
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