linux-kernel - Re: [PATCH -tip 1/3] x86, mce: Add mce

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Date:	Tue, 31 Mar 2009 10:08:00 +0200
From:	Andi Kleen <ak@...ux.intel.com>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
CC:	Ingo Molnar <mingo@...e.hu>, "H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH -tip 1/3] x86, mce: Add mce_threshold option for intel
 cmci

Hidetoshi Seto wrote:
> Andi Kleen wrote:
>> To turn it off you would need to disable the CMCI enable bit
>> completely.
> 
> mce_threshold=0 discourages CMCI initialization.
> The CMCI enable bits are kept in off states in this case.

True, I missed that earlier. Still a different option would be better.


> 
>> However I expect that this will be not a good idea to ever use on Nehalem
>> class systems  at least because without CMCI the machine check code cannot
>> handle shared banks correctly and you'll get duplicated events from them.
>> And on non Nehalem systems there is no CMCI anyways, so it'll be always
>> off.
> 
> One question is that even if one clears record in a shared bank, others
> sharing the bank still can retrieve same record?  Or the duplication of
> recored only happens if a shared bank is polled by multiple cpu in parallel
> at same time?

Only when multiple CPUs poll (or machine check) at the same time.

> 
> So old kernel without CMCI support running on new Nehalem class system will
> make duplicated records, right?

Occasionally when it races yes.

> Doesn't it impact to current distro like RHEL5?

Yes, somewhat. The bigger problem there is actually lack of broadcast handling,
that often leads to incorrect reporting of fatal MCEs.

-Andi
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