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Message-ID: <49D183BA.5020007@jp.fujitsu.com>
Date:	Tue, 31 Mar 2009 11:45:14 +0900
From:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
To:	Andi Kleen <ak@...ux.intel.com>
CC:	Ingo Molnar <mingo@...e.hu>, "H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH -tip 1/3] x86, mce: Add mce_threshold option for intel
 cmci

Andi Kleen wrote:
> To turn it off you would need to disable the CMCI enable bit
> completely.

mce_threshold=0 discourages CMCI initialization.
The CMCI enable bits are kept in off states in this case.

> I have no problems in principle with a mce=nocmci that does that
> but that would be a different patch.

Now I have no strong reason to have threshold >1, so that's OK. 

> However I expect that this will be not a good idea to ever use on Nehalem
> class systems  at least because without CMCI the machine check code cannot
> handle shared banks correctly and you'll get duplicated events from them.
> And on non Nehalem systems there is no CMCI anyways, so it'll be always
> off.

One question is that even if one clears record in a shared bank, others
sharing the bank still can retrieve same record?  Or the duplication of
recored only happens if a shared bank is polled by multiple cpu in parallel
at same time?

So old kernel without CMCI support running on new Nehalem class system will
make duplicated records, right?
Doesn't it impact to current distro like RHEL5?


Thanks,
H.Seto

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