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Message-Id: <20090331.203457.210552824.davem@davemloft.net>
Date:	Tue, 31 Mar 2009 20:34:57 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	divy@...lsio.com
Cc:	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	swise@...ngridcomputing.com
Subject: Re: [PATCH 2.6.30] cxgb3: clear shadow BAR registers

From: Divy Le Ray <divy@...lsio.com>
Date: Tue, 31 Mar 2009 17:58:54 -0700

> From: Divy Le Ray <divy@...lsio.com>
> 
> Ensure that internal shadow BAR registers are cleared on 32-bit platforms.
> 
> Signed-off-by: Divy Le Ray <divy@...lsio.com>

Why is this a problem and why is it not possible to rely
on these being setup to zero by either the BIOS or the PCI
layer?

At best this is a PCI quirk and not something that belongs
in the driver.

I'm not applying this.
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