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Date:	Sat, 04 Apr 2009 10:15:32 +0100
From:	David Woodhouse <dwmw2@...radead.org>
To:	"Han, Weidong" <weidong.han@...el.com>
Cc:	"Siddha, Suresh B" <suresh.b.siddha@...el.com>,
	'Ingo Molnar' <mingo@...e.hu>,
	'IOMMU' <iommu@...ts.linux-foundation.org>,
	'LKML' <linux-kernel@...r.kernel.org>
Subject: RE: [patch 2/2] x2apic/intr-remap: decouple interrupt remapping
 from x2apic

On Sat, 2009-04-04 at 10:07 +0100, David Woodhouse wrote:
> On Sat, 2009-04-04 at 16:48 +0800, Han, Weidong wrote:
> > On linux head, I cannot find EIM_32BIT_APIC_ID in apic.c. I suspect
> > iommu-2.6.git doesn't sync up with linux head on apic.c. I also fixed
> > a bug which causes system hang due to queue invalidation is disabled
> > when enable interrupt remapping. I will resend the patches. Do you
> > want patches based on linux head or your iommu-2.6.git? BTW, I pull
> > iommu-2.6.git very slow due to office proxy. But I can do it if you
> > want. 
> 
> The conflict is with Fenghua's suspend/resume patches: 
> http://git.infradead.org/iommu-2.6.git?a=commitdiff;h=b24696bc5
> 
> A simpler build fix is just to move the definitions of  EIM_8BIT_APIC_ID
> and  EIM_32BIT_APIC_ID  outside #ifdef CONFIG_X86_X2APIC. I'll try that
> and see if it boots.

... which it doesn't. Same failure mode (the faults are normal; crappy
BIOS lacks RMRRs):

[   34.061991] DMAR:DRHD (flags: 0x00000001)base: 0x00000000fe710000
[   34.068076] DMAR:RMRR base: 0x00000000000e9000 end: 0x00000000000e9fff
[   34.074592] DMAR:RMRR base: 0x00000000000ea000 end: 0x00000000000eafff
[   34.081105] DMAR:RMRR base: 0x00000000000eb000 end: 0x00000000000ebfff
[   34.087618] DMAR:RMRR base: 0x00000000000e6000 end: 0x00000000000e6fff
[   34.094131] DMAR:RMRR base: 0x00000000000e7000 end: 0x00000000000e7fff
[   34.100644] DMAR:RMRR base: 0x00000000000e8000 end: 0x00000000000e8fff
[   34.107157] DMAR:Unknown DMAR structure type
[   34.111413] IOAPIC id 8 under DRHD base 0xfe710000
[   34.116220] DRHD: handling fault status reg 2
[   34.120567] DMAR:[DMA Read] Request device [00:1a.2] fault addr ec000 
[   34.120568] DMAR:[fault reason 06] PTE Read access is not set
[   34.133298] DMAR:[DMA Read] Request device [00:1d.1] fault addr ec000 
[   34.133298] DMAR:[fault reason 06] PTE Read access is not set
[   34.145547] DMAR:[DMA Read] Request device [00:1a.1] fault addr ec000 
[   34.145548] DMAR:[fault reason 06] PTE Read access is not set
[   34.157796] DMAR:[DMA Read] Request device [00:1d.0] fault addr ec000 
[   34.157796] DMAR:[fault reason 06] PTE Read access is not set
[   34.170045] DMAR:[DMA Read] Request device [00:1a.0] fault addr ec000 
[   34.170045] DMAR:[fault reason 06] PTE Read access is not set
[   34.182294] DMAR:[DMA Read] Request device [00:1d.2] fault addr ec000 
[   34.182295] DMAR:[fault reason 06] PTE Read access is not set
[   34.194546] IOMMU 0xfe710000: using Queued invalidation


-- 
dwmw2

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