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Date: Tue, 07 Apr 2009 16:31:41 +0400
From: Alexey Klimov <klimov.linux@...il.com>
To: Anders Blomdell <anders.blomdell@...trol.lth.se>
Cc: Jean-Francois Moine <moinejf@...e.fr>,
Linux Media <linux-media@...r.kernel.org>,
linux-kernel@...r.kernel.org
Subject: Re: Topro 6800 webcam driver
Hello, Anders
May i add few comments?
On Tue, 2009-04-07 at 11:41 +0200, Anders Blomdell wrote:
> Add initial support for Topro TP6800 / CmoX CX0342 based webcams.
>
> plain text document attachment (tp6800.diff)
> diff -urp v4l-dvb.orig/linux/Documentation/video4linux/gspca.txt v4l-dvb/linux/Documentation/video4linux/gspca.txt
> --- v4l-dvb.orig/linux/Documentation/video4linux/gspca.txt 2009-04-07 11:26:49.000000000 +0200
> +++ v4l-dvb/linux/Documentation/video4linux/gspca.txt 2009-04-07 11:06:14.000000000 +0200
> @@ -171,6 +171,7 @@ sunplus 05da:1018 Digital Dream Enigma
> stk014 05e1:0893 Syntek DV4000
> spca561 060b:a001 Maxell Compact Pc PM3
> zc3xx 0698:2003 CTX M730V built in
> +tp6800 06a2:0003 Topro TP6800 / CmoX CX0342 webcam
> spca500 06bd:0404 Agfa CL20
> spca500 06be:0800 Optimedia
> sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom
> diff -urp v4l-dvb.orig/linux/drivers/media/video/gspca/Kconfig v4l-dvb/linux/drivers/media/video/gspca/Kconfig
> --- v4l-dvb.orig/linux/drivers/media/video/gspca/Kconfig 2009-04-07 11:26:53.000000000 +0200
> +++ v4l-dvb/linux/drivers/media/video/gspca/Kconfig 2009-04-07 11:06:14.000000000 +0200
> @@ -222,6 +222,16 @@ config USB_GSPCA_T613
> To compile this driver as a module, choose M here: the
> module will be called gspca_t613.
>
> +config USB_GSPCA_TP6800
> + tristate "Topro TP6800 / CmoX CX0342 webcam"
> + depends on VIDEO_V4L2 && USB_GSPCA
> + help
> + Say Y here if you want support for cameras based on the Topro
> + TP6800 / Cmox CX0342 chipsets.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called gspca_tp6800.
> +
> config USB_GSPCA_TV8532
> tristate "TV8532 USB Camera Driver"
> depends on VIDEO_V4L2 && USB_GSPCA
> diff -urp v4l-dvb.orig/linux/drivers/media/video/gspca/Makefile v4l-dvb/linux/drivers/media/video/gspca/Makefile
> --- v4l-dvb.orig/linux/drivers/media/video/gspca/Makefile 2009-04-07 11:26:53.000000000 +0200
> +++ v4l-dvb/linux/drivers/media/video/gspca/Makefile 2009-04-07 11:08:21.000000000 +0200
> @@ -21,6 +21,7 @@ obj-$(CONFIG_USB_GSPCA_SQ905C) += gspc
> obj-$(CONFIG_USB_GSPCA_SUNPLUS) += gspca_sunplus.o
> obj-$(CONFIG_USB_GSPCA_STK014) += gspca_stk014.o
> obj-$(CONFIG_USB_GSPCA_T613) += gspca_t613.o
> +obj-$(CONFIG_USB_GSPCA_TP6800) += gspca_tp6800.o
> obj-$(CONFIG_USB_GSPCA_TV8532) += gspca_tv8532.o
> obj-$(CONFIG_USB_GSPCA_VC032X) += gspca_vc032x.o
> obj-$(CONFIG_USB_GSPCA_ZC3XX) += gspca_zc3xx.o
> @@ -48,6 +49,7 @@ gspca_sq905c-objs := sq905c.o
> gspca_stk014-objs := stk014.o
> gspca_sunplus-objs := sunplus.o
> gspca_t613-objs := t613.o
> +gspca_tp6800-objs := tp6800.o
> gspca_tv8532-objs := tv8532.o
> gspca_vc032x-objs := vc032x.o
> gspca_zc3xx-objs := zc3xx.o
> diff -urp v4l-dvb.orig/linux/drivers/media/video/gspca/tp6800.c v4l-dvb/linux/drivers/media/video/gspca/tp6800.c
> --- v4l-dvb.orig/linux/drivers/media/video/gspca/tp6800.c 2009-04-07 11:28:03.000000000 +0200
> +++ v4l-dvb/linux/drivers/media/video/gspca/tp6800.c 2009-04-07 11:18:36.000000000 +0200
> @@ -0,0 +1,2080 @@
> +/* -*- linux-c -*-
> + *
> + * tp6800.c -- Topro TP6800 webcam driver.
> + *
> + * Copyright (C) 2009 Anders Blomdell (anders.blomdell@...trol.lth.se)
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#define MODULE_NAME "tp6800"
> +
> +#include "gspca.h"
> +
> +/* TP6800 register offsets */
> +
> +#define TP6800_SIF_TYPE 0x10
> +#define TP6800_SIF_CONTROL 0x11
> +#define TP6800_SIF_ADDR_S 0x12
> +#define TP6800_SIF_TX_DATA 0x13
> +#define TP6800_GPIO_PD 0x16
> +#define TP6800_GPIO_IO 0x17
> +#define TP6800_GPIO_DATA 0x18
> +#define TP6800_SIF_ADDR_S2 0x19
> +#define TP6800_ENDP_1_CTL 0x21
> +#define TP6800_TIMING_CFG 0x2f
> +#define TP6800_SENSOR_CFG 0x30
> +#define TP6800_PIXEL_START 0x31
> +#define TP6800_PIXEL_END_L 0x32
> +#define TP6800_PIXEL_END_H 0x33
> +#define TP6800_LINE_START 0x34
> +#define TP6800_LINE_END_L 0x35
> +#define TP6800_LINE_END_H 0x36
> +#define TP6800_FRONT_DARK_ST 0x37
> +#define TP6800_FRONT_DARK_END 0x38
> +#define TP6800_REAR_DARK_ST_L 0x39
> +#define TP6800_REAR_DARK_ST_H 0x3a
> +#define TP6800_REAR_DARK_END_L 0x3b
> +#define TP6800_REAR_DARK_END_H 0x3c
> +#define TP6800_HORIZ_DARK_LINE_L 0x3d
> +#define TP6800_HORIZ_DARK_LINE_H 0x3e
> +#define TP6800_FRAME_RATE 0x3f
> +#define TP6800_REG_50 0x50
> +#define TP6800_REG_51 0x51
> +#define TP6800_REG_52 0x52
> +#define TP6800_REG_53 0x53
> +#define TP6800_DARK_CFG 0x54
> +#define TP6800_GAMMA_R 0x55
> +#define TP6800_GAMMA_G 0x56
> +#define TP6800_GAMMA_B 0x57
> +#define TP6800_EDGE_THRLD 0x5c
> +#define TP6800_DEMOSAIC_CFG 0x5d
> +#define TP6800_FORMAT 0x78
> +#define TP6800_QUALITY 0x79
> +#define TP6800_BLK_THRLD 0x7a
> +
> +/* CX0342 register offsets */
> +
> +#define CX0342_SENSOR_ID 0x00
> +#define CX0342_VERSION_NO 0x01
> +#define CX0342_ORG_X_L 0x02
> +#define CX0342_ORG_X_H 0x03
> +#define CX0342_ORG_Y_L 0x04
> +#define CX0342_ORG_Y_H 0x05
> +#define CX0342_STOP_X_L 0x06
> +#define CX0342_STOP_X_H 0x07
> +#define CX0342_STOP_Y_L 0x08
> +#define CX0342_STOP_Y_H 0x09
> +#define CX0342_FRAME_WIDTH_L 0x0a
> +#define CX0342_FRAME_WIDTH_H 0x0b
> +#define CX0342_FRAME_HEIGH_L 0x0c
> +#define CX0342_FRAME_HEIGH_H 0x0d
> +#define CX0342_EXPO_LINE_L 0x10
> +#define CX0342_EXPO_LINE_H 0x11
> +#define CX0342_EXPO_CLK_L 0x12
> +#define CX0342_EXPO_CLK_H 0x13
> +#define CX0342_RAW_GRGAIN_L 0x14
> +#define CX0342_RAW_GRGAIN_H 0x15
> +#define CX0342_RAW_GBGAIN_L 0x16
> +#define CX0342_RAW_GBGAIN_H 0x17
> +#define CX0342_RAW_RGAIN_L 0x18
> +#define CX0342_RAW_RGAIN_H 0x19
> +#define CX0342_RAW_BGAIN_L 0x1a
> +#define CX0342_RAW_BGAIN_H 0x1b
> +#define CX0342_GLOBAL_GAIN 0x1c
> +#define CX0342_SYS_CTRL_0 0x20
> +#define CX0342_SYS_CTRL_1 0x21
> +#define CX0342_SYS_CTRL_2 0x22
> +#define CX0342_BYPASS_MODE 0x23
> +#define CX0342_SYS_CTRL_3 0x24
> +#define CX0342_TIMING_EN 0x25
> +#define CX0342_OUTPUT_CTRL 0x26
> +#define CX0342_AUTO_ADC_CALIB 0x27
> +#define CX0342_SYS_CTRL_4 0x28
> +#define CX0342_ADCGN 0x30
> +#define CX0342_SLPCR 0x31
> +#define CX0342_SLPFN_LO 0x32
> +#define CX0342_ADC_CTL 0x33
> +#define CX0342_LVRST_BLBIAS 0x34
> +#define CX0342_VTHSEL 0x35
> +#define CX0342_RAMP_RIV 0x36
> +#define CX0342_LDOSEL 0x37
> +#define CX0342_CLOCK_GEN 0x40
> +#define CX0342_SOFT_RESET 0x41
> +#define CX0342_PLL 0x42
> +#define CX0342_DR_ENH_PULSE_OFFSET_L 0x43
> +#define CX0342_DR_ENH_PULSE_OFFSET_H 0x44
> +#define CX0342_DR_ENH_PULSE_POS_L 0x45
> +#define CX0342_DR_ENH_PULSE_POS_H 0x46
> +#define CX0342_DR_ENH_PULSE_WIDTH 0x47
> +#define CX0342_AS_CURRENT_CNT_L 0x48
> +#define CX0342_AS_CURRENT_CNT_H 0x49
> +#define CX0342_AS_PREVIOUS_CNT_L 0x4a
> +#define CX0342_AS_PREVIOUS_CNT_H 0x4b
> +#define CX0342_SPV_VALUE_L 0x4c
> +#define CX0342_SPV_VALUE_H 0x4d
> +#define CX0342_GPXLTHD_L 0x50
> +#define CX0342_GPXLTHD_H 0x51
> +#define CX0342_RBPXLTHD_L 0x52
> +#define CX0342_RBPXLTHD_H 0x53
> +#define CX0342_PLANETHD_L 0x54
> +#define CX0342_PLANETHD_H 0x55
> +#define CX0342_ROWDARK_TH 0x56
> +#define CX0342_ROWDARK_TOL 0x57
> +#define CX0342_RB_GAP_L 0x58
> +#define CX0342_RB_GAP_H 0x59
> +#define CX0342_G_GAP_L 0x5a
> +#define CX0342_G_GAP_H 0x5b
> +#define CX0342_AUTO_ROW_DARK 0x60
> +#define CX0342_MANUAL_DARK_VALUE 0x61
> +#define CX0342_GB_DARK_OFFSET 0x62
> +#define CX0342_GR_DARK_OFFSET 0x63
> +#define CX0342_RED_DARK_OFFSET 0x64
> +#define CX0342_BLUE_DARK_OFFSET 0x65
> +#define CX0342_DATA_SCALING_MULTI 0x66
> +#define CX0342_AUTOD_Q_FRAME 0x67
> +#define CX0342_AUTOD_ALLOW_VARI 0x68
> +#define CX0342_AUTO_DARK_VALUE_L 0x69
> +#define CX0342_AUTO_DARK_VALUE_H 0x6a
> +#define CX0342_IO_CTRL_0 0x70
> +#define CX0342_IO_CTRL_1 0x71
> +#define CX0342_IO_CTRL_2 0x72
> +#define CX0342_IDLE_CTRL 0x73
> +#define CX0342_TEST_MODE 0x74
> +#define CX0342_FRAME_FIX_DATA_TEST 0x75
> +#define CX0342_FRAME_CNT_TEST 0x76
> +#define CX0342_RST_OVERFLOW_L 0x80
> +#define CX0342_RST_OVERFLOW_H 0x81
> +#define CX0342_RST_UNDERFLOW_L 0x82
> +#define CX0342_RST_UNDERFLOW_H 0x83
> +#define CX0342_DATA_OVERFLOW_L 0x84
> +#define CX0342_DATA_OVERFLOW_H 0x85
> +#define CX0342_DATA_UNDERFLOW_L 0x86
> +#define CX0342_DATA_UNDERFLOW_H 0x87
> +#define CX0342_CHANNEL_0_0_L_irst 0x90
> +#define CX0342_CHANNEL_0_0_H_irst 0x91
> +#define CX0342_CHANNEL_0_1_L_irst 0x92
> +#define CX0342_CHANNEL_0_1_H_irst 0x93
> +#define CX0342_CHANNEL_0_2_L_irst 0x94
> +#define CX0342_CHANNEL_0_2_H_irst 0x95
> +#define CX0342_CHANNEL_0_3_L_irst 0x96
> +#define CX0342_CHANNEL_0_3_H_irst 0x97
> +#define CX0342_CHANNEL_0_4_L_irst 0x98
> +#define CX0342_CHANNEL_0_4_H_irst 0x99
> +#define CX0342_CHANNEL_0_5_L_irst 0x9a
> +#define CX0342_CHANNEL_0_5_H_irst 0x9b
> +#define CX0342_CHANNEL_0_6_L_irst 0x9c
> +#define CX0342_CHANNEL_0_6_H_irst 0x9d
> +#define CX0342_CHANNEL_0_7_L_irst 0x9e
> +#define CX0342_CHANNEL_0_7_H_irst 0x9f
> +#define CX0342_CHANNEL_1_0_L_itx 0xa0
> +#define CX0342_CHANNEL_1_0_H_itx 0xa1
> +#define CX0342_CHANNEL_1_1_L_itx 0xa2
> +#define CX0342_CHANNEL_1_1_H_itx 0xa3
> +#define CX0342_CHANNEL_1_2_L_itx 0xa4
> +#define CX0342_CHANNEL_1_2_H_itx 0xa5
> +#define CX0342_CHANNEL_1_3_L_itx 0xa6
> +#define CX0342_CHANNEL_1_3_H_itx 0xa7
> +#define CX0342_CHANNEL_1_4_L_itx 0xa8
> +#define CX0342_CHANNEL_1_4_H_itx 0xa9
> +#define CX0342_CHANNEL_1_5_L_itx 0xaa
> +#define CX0342_CHANNEL_1_5_H_itx 0xab
> +#define CX0342_CHANNEL_1_6_L_itx 0xac
> +#define CX0342_CHANNEL_1_6_H_itx 0xad
> +#define CX0342_CHANNEL_1_7_L_itx 0xae
> +#define CX0342_CHANNEL_1_7_H_itx 0xaf
> +#define CX0342_CHANNEL_2_0_L_iwl 0xb0
> +#define CX0342_CHANNEL_2_0_H_iwl 0xb1
> +#define CX0342_CHANNEL_2_1_L_iwl 0xb2
> +#define CX0342_CHANNEL_2_1_H_iwl 0xb3
> +#define CX0342_CHANNEL_2_2_L_iwl 0xb4
> +#define CX0342_CHANNEL_2_2_H_iwl 0xb5
> +#define CX0342_CHANNEL_2_3_L_iwl 0xb6
> +#define CX0342_CHANNEL_2_3_H_iwl 0xb7
> +#define CX0342_CHANNEL_2_4_L_iwl 0xb8
> +#define CX0342_CHANNEL_2_4_H_iwl 0xb9
> +#define CX0342_CHANNEL_2_5_L_iwl 0xba
> +#define CX0342_CHANNEL_2_5_H_iwl 0xbb
> +#define CX0342_CHANNEL_2_6_L_iwl 0xbc
> +#define CX0342_CHANNEL_2_6_H_iwl 0xbd
> +#define CX0342_CHANNEL_2_7_L_iwl 0xbe
> +#define CX0342_CHANNEL_2_7_H_iwl 0xbf
> +#define CX0342_CHANNEL_3_0_L_ensp 0xc0
> +#define CX0342_CHANNEL_3_0_H_ensp 0xc1
> +#define CX0342_CHANNEL_3_1_L_ensp 0xc2
> +#define CX0342_CHANNEL_3_1_H_ensp 0xc3
> +#define CX0342_CHANNEL_3_2_L_ensp 0xc4
> +#define CX0342_CHANNEL_3_2_H_ensp 0xc5
> +#define CX0342_CHANNEL_3_3_L_ensp 0xc6
> +#define CX0342_CHANNEL_3_3_H_ensp 0xc7
> +#define CX0342_CHANNEL_3_4_L_ensp 0xc8
> +#define CX0342_CHANNEL_3_4_H_ensp 0xc9
> +#define CX0342_CHANNEL_3_5_L_ensp 0xca
> +#define CX0342_CHANNEL_3_5_H_ensp 0xcb
> +#define CX0342_CHANNEL_3_6_L_ensp 0xcc
> +#define CX0342_CHANNEL_3_6_H_ensp 0xcd
> +#define CX0342_CHANNEL_3_7_L_ensp 0xce
> +#define CX0342_CHANNEL_3_7_H_ensp 0xcf
> +#define CX0342_CHANNEL_4_0_L_sela 0xd0
> +#define CX0342_CHANNEL_4_0_H_sela 0xd1
> +#define CX0342_CHANNEL_4_1_L_sela 0xd2
> +#define CX0342_CHANNEL_4_1_H_sela 0xd3
> +#define CX0342_CHANNEL_5_0_L_intla 0xe0
> +#define CX0342_CHANNEL_5_0_H_intla 0xe1
> +#define CX0342_CHANNEL_5_1_L_intla 0xe2
> +#define CX0342_CHANNEL_5_1_H_intla 0xe3
> +#define CX0342_CHANNEL_5_2_L_intla 0xe4
> +#define CX0342_CHANNEL_5_2_H_intla 0xe5
> +#define CX0342_CHANNEL_5_3_L_intla 0xe6
> +#define CX0342_CHANNEL_5_3_H_intla 0xe7
> +#define CX0342_CHANNEL_6_0_L_xa_sel_pos 0xf0
> +#define CX0342_CHANNEL_6_0_H_xa_sel_pos 0xf1
> +#define CX0342_CHANNEL_7_1_L_cds_pos 0xf2
> +#define CX0342_CHANNEL_7_1_H_cds_pos 0xf3
> +#define CX0342_SENSOR_HEIGHT_L 0xfb
> +#define CX0342_SENSOR_HEIGHT_H 0xfc
> +#define CX0342_SENSOR_WIDTH_L 0xfd
> +#define CX0342_SENSOR_WIDTH_H 0xfe
> +#define CX0342_VSYNC_HSYNC_READ 0xff
> +
> +enum resolution {
> + size_320x240, size_640x480
> +};
> +
> +__u8 SOI[] = {
> + /* Start of image */
> + 0xff, 0xd8
> +};
> +
> +__u8 SOF0[19] = {
> + /* Start of frame 0 */
> + 0xff, 0xc0, 0x00, 0x11,
> + 0x08,
> + 0x01, 0xe0,
> + 0x02, 0x80,
> + 0x03,
> + 0x01, 0x21, 0x00,
> + 0x02, 0x11, 0x01,
> + 0x03, 0x11, 0x01,
> +};
> +
> +__u8 DHT[] = {
> + /* Define Huffman table (thanks to Thomas Kaiser) */
> + 0xff, 0xc4, 0x01, 0x5e,
> + 0x00, 0x00, 0x02, 0x03,
> + 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02,
> + 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x10,
> + 0x00, 0x02, 0x01, 0x02, 0x04, 0x04, 0x03, 0x04,
> + 0x07, 0x05, 0x04, 0x06, 0x01, 0x00, 0x00, 0x57,
> + 0x01, 0x02, 0x03, 0x00, 0x11, 0x04, 0x12, 0x21,
> + 0x31, 0x13, 0x41, 0x51, 0x61, 0x05, 0x22, 0x32,
> + 0x14, 0x71, 0x81, 0x91, 0x15, 0x23, 0x42, 0x52,
> + 0x62, 0xa1, 0xb1, 0x06, 0x33, 0x72, 0xc1, 0xd1,
> + 0x24, 0x43, 0x53, 0x82, 0x16, 0x34, 0x92, 0xa2,
> + 0xe1, 0xf1, 0xf0, 0x07, 0x08, 0x17, 0x18, 0x25,
> + 0x26, 0x27, 0x28, 0x35, 0x36, 0x37, 0x38, 0x44,
> + 0x45, 0x46, 0x47, 0x48, 0x54, 0x55, 0x56, 0x57,
> + 0x58, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x73,
> + 0x74, 0x75, 0x76, 0x77, 0x78, 0x83, 0x84, 0x85,
> + 0x86, 0x87, 0x88, 0x93, 0x94, 0x95, 0x96, 0x97,
> + 0x98, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xb2,
> + 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xc2, 0xc3,
> + 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xd2, 0xd3, 0xd4,
> + 0xd5, 0xd6, 0xd7, 0xd8, 0xe2, 0xe3, 0xe4, 0xe5,
> + 0xe6, 0xe7, 0xe8, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6,
> + 0xf7, 0xf8, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
> + 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04,
> + 0x05, 0x06, 0x07, 0x08, 0x09, 0x11, 0x00, 0x02,
> + 0x01, 0x02, 0x04, 0x04, 0x03, 0x04, 0x07, 0x05,
> + 0x04, 0x06, 0x01, 0x00, 0x00, 0x57, 0x00, 0x01,
> + 0x11, 0x02, 0x21, 0x03, 0x12, 0x31, 0x41, 0x13,
> + 0x22, 0x51, 0x61, 0x04, 0x32, 0x71, 0x05, 0x14,
> + 0x23, 0x42, 0x33, 0x52, 0x81, 0x91, 0xa1, 0xb1,
> + 0xf0, 0x06, 0x15, 0xc1, 0xd1, 0xe1, 0x24, 0x43,
> + 0x62, 0xf1, 0x16, 0x25, 0x34, 0x53, 0x72, 0x82,
> + 0x92, 0x07, 0x08, 0x17, 0x18, 0x26, 0x27, 0x28,
> + 0x35, 0x36, 0x37, 0x38, 0x44, 0x45, 0x46, 0x47,
> + 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x63, 0x64,
> + 0x65, 0x66, 0x67, 0x68, 0x73, 0x74, 0x75, 0x76,
> + 0x77, 0x78, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88,
> + 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0xa2, 0xa3,
> + 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xb2, 0xb3, 0xb4,
> + 0xb5, 0xb6, 0xb7, 0xb8, 0xc2, 0xc3, 0xc4, 0xc5,
> + 0xc6, 0xc7, 0xc8, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6,
> + 0xd7, 0xd8, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
> + 0xe8, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
> +};
> +
> +__u8 DQT[17][134] = {
> + /* Define quantization table (thanks to Thomas Kaiser) */
> + { /* Quality 0 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x01,
> + 0x04, 0x04, 0x04, 0x06, 0x05, 0x06, 0x0b, 0x06,
> + 0x06, 0x0b, 0x18, 0x10, 0x0e, 0x10, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + },
> + { /* Quality 1 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x09, 0x09, 0x09, 0x09, 0x09,
> + 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
> + 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
> + 0x01,
> + 0x08, 0x09, 0x09, 0x0c, 0x0a, 0x0c, 0x17, 0x0d,
> + 0x0d, 0x17, 0x31, 0x21, 0x1c, 0x21, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
> + },
> + { /* Quality 2 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x06, 0x06, 0x06, 0x04, 0x04, 0x04,
> + 0x04, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
> + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
> + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
> + 0x06, 0x06, 0x06, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x01,
> + 0x0c, 0x0d, 0x0d, 0x12, 0x0f, 0x12, 0x23, 0x13,
> + 0x13, 0x23, 0x4a, 0x31, 0x2a, 0x31, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
> + },
> + { /* Quality 3 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x08, 0x08, 0x08, 0x04, 0x04, 0x04,
> + 0x04, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
> + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
> + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
> + 0x08, 0x08, 0x08, 0x13, 0x13, 0x13, 0x13, 0x13,
> + 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13,
> + 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13,
> + 0x01,
> + 0x11, 0x12, 0x12, 0x18, 0x15, 0x18, 0x2f, 0x1a,
> + 0x1a, 0x2f, 0x63, 0x42, 0x38, 0x42, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
> + },
> + { /* Quality 4 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
> + 0x05, 0x05, 0x0a, 0x0a, 0x0a, 0x05, 0x05, 0x05,
> + 0x05, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
> + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
> + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
> + 0x0a, 0x0a, 0x0a, 0x17, 0x17, 0x17, 0x17, 0x17,
> + 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
> + 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
> + 0x01,
> + 0x11, 0x16, 0x16, 0x1e, 0x1a, 0x1e, 0x3a, 0x20,
> + 0x20, 0x3a, 0x7b, 0x52, 0x46, 0x52, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
> + },
> + { /* Quality 5 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
> + 0x06, 0x06, 0x0c, 0x0c, 0x0c, 0x06, 0x06, 0x06,
> + 0x06, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
> + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
> + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
> + 0x0c, 0x0c, 0x0c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x01,
> + 0x11, 0x1b, 0x1b, 0x24, 0x1f, 0x24, 0x46, 0x27,
> + 0x27, 0x46, 0x94, 0x63, 0x54, 0x63, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94,
> + },
> + { /* Quality 6 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x05, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
> + 0x07, 0x07, 0x0e, 0x0e, 0x0e, 0x07, 0x07, 0x07,
> + 0x07, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x0e, 0x21, 0x21, 0x21, 0x21, 0x21,
> + 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
> + 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
> + 0x01,
> + 0x15, 0x1f, 0x1f, 0x2a, 0x24, 0x2a, 0x52, 0x2d,
> + 0x2d, 0x52, 0xad, 0x73, 0x62, 0x73, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
> + },
> + { /* Quality 7 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x05, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
> + 0x08, 0x08, 0x10, 0x10, 0x10, 0x08, 0x08, 0x08,
> + 0x08, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
> + 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
> + 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
> + 0x10, 0x10, 0x10, 0x26, 0x26, 0x26, 0x26, 0x26,
> + 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26,
> + 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26,
> + 0x01,
> + 0x15, 0x24, 0x24, 0x30, 0x2a, 0x30, 0x5e, 0x34,
> + 0x34, 0x5e, 0xc6, 0x84, 0x70, 0x84, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
> + },
> + { /* Quality 8 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x06, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
> + 0x0a, 0x0a, 0x14, 0x14, 0x14, 0x0a, 0x0a, 0x0a,
> + 0x0a, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
> + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
> + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
> + 0x14, 0x14, 0x14, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f,
> + 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f,
> + 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f,
> + 0x01,
> + 0x19, 0x2d, 0x2d, 0x3c, 0x34, 0x3c, 0x75, 0x41,
> + 0x41, 0x75, 0xf7, 0xa5, 0x8c, 0xa5, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
> + },
> + { /* Quality 9 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x06, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
> + 0x0c, 0x0c, 0x18, 0x18, 0x18, 0x0c, 0x0c, 0x0c,
> + 0x0c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x18, 0x39, 0x39, 0x39, 0x39, 0x39,
> + 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39,
> + 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39,
> + 0x01,
> + 0x19, 0x36, 0x36, 0x48, 0x3f, 0x48, 0x8d, 0x4e,
> + 0x4e, 0x8d, 0xff, 0xc6, 0xa8, 0xc6, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 10 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x07, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x0e, 0x1c, 0x1c, 0x1c, 0x0e, 0x0e, 0x0e,
> + 0x0e, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x1c, 0x42, 0x42, 0x42, 0x42, 0x42,
> + 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42,
> + 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42,
> + 0x01,
> + 0x1d, 0x3f, 0x3f, 0x54, 0x49, 0x54, 0xa4, 0x5b,
> + 0x5b, 0xa4, 0xff, 0xe7, 0xc4, 0xe7, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 11 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x07, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
> + 0x10, 0x10, 0x20, 0x20, 0x20, 0x10, 0x10, 0x10,
> + 0x10, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c,
> + 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c,
> + 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c,
> + 0x01,
> + 0x1d, 0x48, 0x48, 0x60, 0x54, 0x60, 0xbc, 0x68,
> + 0x68, 0xbc, 0xff, 0xff, 0xe0, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 12 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x08, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
> + 0x14, 0x14, 0x28, 0x28, 0x28, 0x14, 0x14, 0x14,
> + 0x14, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
> + 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
> + 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
> + 0x28, 0x28, 0x28, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f,
> + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f,
> + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f,
> + 0x01,
> + 0x22, 0x5a, 0x5a, 0x78, 0x69, 0x78, 0xeb, 0x82,
> + 0x82, 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 13 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x08, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18, 0x30, 0x30, 0x30, 0x18, 0x18, 0x18,
> + 0x18, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x72, 0x72, 0x72, 0x72, 0x72,
> + 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72,
> + 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72,
> + 0x01,
> + 0x22, 0x6c, 0x6c, 0x90, 0x7e, 0x90, 0xff, 0x9c,
> + 0x9c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 14 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x0a, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x1c, 0x38, 0x38, 0x38, 0x1c, 0x1c, 0x1c,
> + 0x1c, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38,
> + 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38,
> + 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38,
> + 0x38, 0x38, 0x38, 0x85, 0x85, 0x85, 0x85, 0x85,
> + 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
> + 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
> + 0x01,
> + 0x2a, 0x7e, 0x7e, 0xa8, 0x93, 0xa8, 0xff, 0xb6,
> + 0xb6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 15 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x40, 0x40, 0x40, 0x20, 0x20, 0x20,
> + 0x20, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
> + 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
> + 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
> + 0x40, 0x40, 0x40, 0x98, 0x98, 0x98, 0x98, 0x98,
> + 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98,
> + 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98,
> + 0x01,
> + 0x2a, 0x90, 0x90, 0xc0, 0xa8, 0xc0, 0xff, 0xd0,
> + 0xd0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
> + },
> + { /* Quality 16-31 */
> + 0xff, 0xdb, 0x00, 0x84,
> + 0x00,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x01,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
> + }
> +};
> +
> +__u8 SOS[] = {
> + /* SOS (start of scan) */
> + 0xff, 0xda, 0x00, 0x0c,
> + 0x03, 0x01, 0x00, 0x02, 0x11, 0x03, 0x11, 0x00, 0x3f, 0x00,
> +};
> +
> +MODULE_DESCRIPTION("Topro TP6800 gspca webcam driver");
> +MODULE_AUTHOR("Anders Blomdell <anders.blomdell@...trol.lth.se>");
> +MODULE_LICENSE("GPL");
> +
> +struct sd {
> + struct gspca_dev gspca_dev; /* !! must be the first item */
> +
> + unsigned char quality;
> + unsigned int framerate;
> + unsigned int rgain;
> + unsigned int grgain;
> + unsigned int gbgain;
> + unsigned int bgain;
> +};
> +
> +/* V4L2 controls supported by the driver */
> +static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getquality(struct gspca_dev *gspca_dev, __s32 *val);
> +static int sd_setframerate(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getframerate(struct gspca_dev *gspca_dev, __s32 *val);
> +static int sd_setrgain(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getrgain(struct gspca_dev *gspca_dev, __s32 *val);
> +static int sd_setgrgain(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getgrgain(struct gspca_dev *gspca_dev, __s32 *val);
> +static int sd_setgbgain(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getgbgain(struct gspca_dev *gspca_dev, __s32 *val);
> +static int sd_setbgain(struct gspca_dev *gspca_dev, __s32 val);
> +static int sd_getbgain(struct gspca_dev *gspca_dev, __s32 *val);
> +
> +static struct ctrl sd_ctrls[] = {
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "JPEG quality",
> + .minimum = 0,
> + .maximum = 16,
> + .step = 1,
> +#define QUALITY_DEF 14
> + .default_value = QUALITY_DEF,
> + },
> + .set = sd_setquality,
> + .get = sd_getquality,
> + },
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE + 1,
> + /* VLC cant select with this: .type = V4L2_CTRL_TYPE_MENU, */
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "Framerate",
> + .minimum = 0,
> + .maximum = 6, /* 2.5, 5, 7.5, 10, 15, 20, 30 */
> + .step = 1,
> +#define FRAMERATE_DEF 6
> + .default_value = FRAMERATE_DEF,
> + },
> + .set = sd_setframerate,
> + .get = sd_getframerate,
> + },
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE + 2,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "R_gain",
> + .minimum = 0,
> + .maximum = 4095,
> + .step = 1,
> +#define RGAIN_DEF 256
> + .default_value = RGAIN_DEF,
> + },
> + .set = sd_setrgain,
> + .get = sd_getrgain,
> + },
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE + 3,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "GR_gain",
> + .minimum = 0,
> + .maximum = 4095,
> + .step = 1,
> +#define GRGAIN_DEF 256
> + .default_value = GRGAIN_DEF,
> + },
> + .set = sd_setgrgain,
> + .get = sd_getgrgain,
> + },
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE + 4,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "GB_gain",
> + .minimum = 0,
> + .maximum = 4095,
> + .step = 1,
> +#define GBGAIN_DEF 256
> + .default_value = GBGAIN_DEF,
> + },
> + .set = sd_setgbgain,
> + .get = sd_getgbgain,
> + },
> + {
> + {
> + .id = V4L2_CID_PRIVATE_BASE + 5,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "B_gain",
> + .minimum = 0,
> + .maximum = 4095,
> + .step = 1,
> +#define BGAIN_DEF 256
> + .default_value = BGAIN_DEF,
> + },
> + .set = sd_setbgain,
> + .get = sd_getbgain,
> + }
> +};
> +
> +static struct v4l2_pix_format vga_mode[] = {
> + {
> + 320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
> + .bytesperline = 320,
> + .sizeimage = 320 * 240 + 590,
> + .colorspace = V4L2_COLORSPACE_JPEG,
> + .priv = size_320x240},
> + {
> + 640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
> + .bytesperline = 640,
> + .sizeimage = 640 * 480 + 590,
> + .colorspace = V4L2_COLORSPACE_JPEG,
> + .priv = size_640x480},
> +};
> +
> +#define BULK_OUT_SIZE 0x20
> +
> +static int reg_w(struct gspca_dev *gspca_dev, __u8 index, __u8 value)
> +{
> + struct usb_device *dev = gspca_dev->dev;
> + int res;
> +
> + res = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
> + 0x0e,
> + (USB_DIR_OUT | USB_TYPE_VENDOR |
> + USB_RECIP_INTERFACE), value, index, NULL, 0,
> + 500);
> + /* printk("%x = write(%x, %x)\n", res, index, value); */
> + return res;
> +}
> +
> +static int reg_r(struct gspca_dev *gspca_dev, __u8 index, __u8 *value)
> +{
> + struct usb_device *dev = gspca_dev->dev;
> + int res;
> +
> + res = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 0x0d,
> + (USB_DIR_IN | USB_TYPE_VENDOR |
> + USB_RECIP_INTERFACE), 0, index, value, 1, 500);
> + /* printk("%x = read(%x, %x)\n", res, index, *value); */
> + return res == 1 ? 0 : res;
> +}
> +
> +static int cx0342_w(struct gspca_dev *gspca_dev, __u8 index, __u8 value)
> +{
> + int res;
> +
> + res = reg_w(gspca_dev, TP6800_SIF_ADDR_S, 0x20);
> + if (res != 0)
> + goto out;
> + res = reg_w(gspca_dev, TP6800_SIF_ADDR_S2, index);
> + if (res != 0)
> + goto out;
> + res = reg_w(gspca_dev, TP6800_SIF_TX_DATA, value);
> + if (res != 0)
> + goto out;
> + res = reg_w(gspca_dev, TP6800_SIF_CONTROL, 0x01);
> +out:
> + return res;
> +}
> +
> +static int bulk_w(struct gspca_dev *gspca_dev, __u8 tag, __u8 *data, int length)
> +{
> + struct usb_device *dev = gspca_dev->dev;
> + int res = 0;
> + __u8 buf[BULK_OUT_SIZE];
> + int start, count, actual_count;
> +
> + count = 0;
> + for (start = 0; start < length;) {
> + int i;
> +
> + buf[0] = tag;
> + for (i = 0;
> + ((i < BULK_OUT_SIZE - 1) && (start + i < length)); i++) {
> + buf[i + 1] = data[start + i];
> + count = i + 2;
> + }
> + res = usb_bulk_msg(dev,
> + usb_sndbulkpipe(dev, 3),
> + buf, count, &actual_count, 500);
Looks like you never check res value.
> + start = start + count - 1;
> + }
> + return res;
> +}
> +
> +static __u8 quality_map[17] = {
> + 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 16
> +};
> +
> +static void write_quality(struct gspca_dev *gspca_dev)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + if (0 <= sd->quality && sd->quality <= 16)
> + reg_w(gspca_dev, TP6800_QUALITY, quality_map[sd->quality]);
> +}
> +
> +static __u8 gamma[3][1024] = {
> + {
> + 0x00, 0x01, 0x02, 0x05, 0x07, 0x08, 0x0a, 0x0c,
> + 0x0d, 0x0e, 0x10, 0x12, 0x14, 0x15, 0x16, 0x17,
> + 0x18, 0x1a, 0x1b, 0x1c, 0x1e, 0x1f, 0x20, 0x22,
> + 0x23, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2b, 0x2c,
> + 0x2d, 0x2d, 0x2f, 0x30, 0x31, 0x33, 0x34, 0x34,
> + 0x35, 0x37, 0x38, 0x38, 0x39, 0x3a, 0x3b, 0x3b,
> + 0x3c, 0x3d, 0x3f, 0x3f, 0x40, 0x42, 0x42, 0x43,
> + 0x44, 0x44, 0x45, 0x47, 0x47, 0x48, 0x49, 0x49,
> + 0x4a, 0x4b, 0x4b, 0x4c, 0x4c, 0x4d, 0x4f, 0x4f,
> + 0x50, 0x50, 0x52, 0x53, 0x53, 0x54, 0x54, 0x55,
> + 0x55, 0x56, 0x56, 0x58, 0x58, 0x59, 0x5a, 0x5a,
> + 0x5b, 0x5b, 0x5c, 0x5c, 0x5e, 0x5e, 0x5f, 0x5f,
> + 0x60, 0x60, 0x61, 0x61, 0x62, 0x62, 0x63, 0x63,
> + 0x65, 0x65, 0x65, 0x66, 0x66, 0x67, 0x67, 0x68,
> + 0x68, 0x69, 0x69, 0x6a, 0x6a, 0x6a, 0x6c, 0x6c,
> + 0x6d, 0x6d, 0x6e, 0x6e, 0x6e, 0x6f, 0x6f, 0x70,
> + 0x70, 0x70, 0x71, 0x71, 0x73, 0x73, 0x73, 0x74,
> + 0x74, 0x75, 0x75, 0x75, 0x77, 0x77, 0x78, 0x78,
> + 0x78, 0x79, 0x79, 0x79, 0x7a, 0x7a, 0x7b, 0x7b,
> + 0x7b, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7f, 0x7f,
> + 0x7f, 0x80, 0x80, 0x80, 0x81, 0x81, 0x81, 0x82,
> + 0x82, 0x82, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85,
> + 0x86, 0x86, 0x86, 0x88, 0x88, 0x88, 0x89, 0x89,
> + 0x89, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b, 0x8b, 0x8d,
> + 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f,
> + 0x8f, 0x90, 0x90, 0x90, 0x91, 0x91, 0x91, 0x91,
> + 0x92, 0x92, 0x92, 0x93, 0x93, 0x93, 0x93, 0x94,
> + 0x94, 0x94, 0x96, 0x96, 0x96, 0x97, 0x97, 0x97,
> + 0x97, 0x98, 0x98, 0x98, 0x98, 0x99, 0x99, 0x99,
> + 0x9a, 0x9a, 0x9a, 0x9a, 0x9b, 0x9b, 0x9b, 0x9b,
> + 0x9c, 0x9c, 0x9c, 0x9d, 0x9d, 0x9d, 0x9d, 0x9e,
> + 0x9e, 0x9e, 0x9e, 0xa0, 0xa0, 0xa0, 0xa0, 0xa1,
> + 0xa1, 0xa1, 0xa1, 0xa2, 0xa2, 0xa2, 0xa2, 0xa3,
> + 0xa3, 0xa3, 0xa4, 0xa4, 0xa4, 0xa4, 0xa5, 0xa5,
> + 0xa5, 0xa5, 0xa5, 0xa6, 0xa6, 0xa6, 0xa6, 0xa8,
> + 0xa8, 0xa8, 0xa8, 0xa9, 0xa9, 0xa9, 0xa9, 0xab,
> + 0xab, 0xab, 0xab, 0xac, 0xac, 0xac, 0xac, 0xad,
> + 0xad, 0xad, 0xad, 0xad, 0xae, 0xae, 0xae, 0xae,
> + 0xaf, 0xaf, 0xaf, 0xaf, 0xb0, 0xb0, 0xb0, 0xb0,
> + 0xb0, 0xb1, 0xb1, 0xb1, 0xb1, 0xb2, 0xb2, 0xb2,
> + 0xb2, 0xb2, 0xb3, 0xb3, 0xb3, 0xb3, 0xb4, 0xb4,
> + 0xb4, 0xb4, 0xb4, 0xb6, 0xb6, 0xb6, 0xb6, 0xb7,
> + 0xb7, 0xb7, 0xb7, 0xb7, 0xb8, 0xb8, 0xb8, 0xb8,
> + 0xb8, 0xb9, 0xb9, 0xb9, 0xb9, 0xba, 0xba, 0xba,
> + 0xba, 0xba, 0xbc, 0xbc, 0xbc, 0xbc, 0xbc, 0xbd,
> + 0xbd, 0xbd, 0xbd, 0xbd, 0xbe, 0xbe, 0xbe, 0xbe,
> + 0xbe, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf, 0xc0, 0xc0,
> + 0xc0, 0xc0, 0xc0, 0xc2, 0xc2, 0xc2, 0xc2, 0xc3,
> + 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0xc4, 0xc4, 0xc4,
> + 0xc4, 0xc4, 0xc5, 0xc5, 0xc5, 0xc5, 0xc5, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc6, 0xc7, 0xc7, 0xc7, 0xc7,
> + 0xc7, 0xc9, 0xc9, 0xc9, 0xc9, 0xc9, 0xca, 0xca,
> + 0xca, 0xca, 0xca, 0xcb, 0xcb, 0xcb, 0xcb, 0xcb,
> + 0xcb, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcd, 0xcd,
> + 0xcd, 0xcd, 0xcd, 0xce, 0xce, 0xce, 0xce, 0xce,
> + 0xce, 0xcf, 0xcf, 0xcf, 0xcf, 0xcf, 0xd0, 0xd0,
> + 0xd0, 0xd0, 0xd0, 0xd0, 0xd1, 0xd1, 0xd1, 0xd1,
> + 0xd1, 0xd3, 0xd3, 0xd3, 0xd3, 0xd3, 0xd4, 0xd4,
> + 0xd4, 0xd4, 0xd4, 0xd4, 0xd6, 0xd6, 0xd6, 0xd6,
> + 0xd6, 0xd6, 0xd7, 0xd7, 0xd7, 0xd7, 0xd7, 0xd8,
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> + 0x7a, 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c,
> + 0x7c, 0x7d, 0x7d, 0x7d, 0x7f, 0x7f, 0x7f, 0x80,
> + 0x80, 0x80, 0x81, 0x81, 0x81, 0x81, 0x82, 0x82,
> + 0x82, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x85,
> + 0x86, 0x86, 0x86, 0x88, 0x88, 0x88, 0x88, 0x89,
> + 0x89, 0x89, 0x8a, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b,
> + 0x8b, 0x8b, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e,
> + 0x8e, 0x8f, 0x8f, 0x8f, 0x8f, 0x90, 0x90, 0x90,
> + 0x91, 0x91, 0x91, 0x91, 0x92, 0x92, 0x92, 0x92,
> + 0x93, 0x93, 0x93, 0x93, 0x94, 0x94, 0x94, 0x94,
> + 0x96, 0x96, 0x96, 0x96, 0x97, 0x97, 0x97, 0x97,
> + 0x98, 0x98, 0x98, 0x98, 0x99, 0x99, 0x99, 0x99,
> + 0x9a, 0x9a, 0x9a, 0x9a, 0x9b, 0x9b, 0x9b, 0x9b,
> + 0x9b, 0x9c, 0x9c, 0x9c, 0x9c, 0x9d, 0x9d, 0x9d,
> + 0x9d, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0xa0, 0xa0,
> + 0xa0, 0xa0, 0xa1, 0xa1, 0xa1, 0xa1, 0xa2, 0xa2,
> + 0xa2, 0xa2, 0xa2, 0xa3, 0xa3, 0xa3, 0xa3, 0xa4,
> + 0xa4, 0xa4, 0xa4, 0xa4, 0xa5, 0xa5, 0xa5, 0xa5,
> + 0xa5, 0xa6, 0xa6, 0xa6, 0xa6, 0xa8, 0xa8, 0xa8,
> + 0xa8, 0xa8, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xab,
> + 0xab, 0xab, 0xab, 0xab, 0xac, 0xac, 0xac, 0xac,
> + 0xad, 0xad, 0xad, 0xad, 0xad, 0xae, 0xae, 0xae,
> + 0xae, 0xae, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xb0,
> + 0xb0, 0xb0, 0xb0, 0xb0, 0xb1, 0xb1, 0xb1, 0xb1,
> + 0xb1, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb3, 0xb3,
> + 0xb3, 0xb3, 0xb3, 0xb4, 0xb3, 0xb4, 0xb4, 0xb4,
> + 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb7, 0xb7,
> + 0xb7, 0xb7, 0xb7, 0xb8, 0xb8, 0xb8, 0xb8, 0xb8,
> + 0xb9, 0xb9, 0xb9, 0xb9, 0xb9, 0xb9, 0xba, 0xba,
> + 0xba, 0xba, 0xba, 0xbc, 0xbc, 0xbc, 0xbc, 0xbc,
> + 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbe, 0xbe,
> + 0xbe, 0xbe, 0xbe, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf,
> + 0xbf, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc2, 0xc2,
> + 0xc2, 0xc2, 0xc2, 0xc2, 0xc3, 0xc3, 0xc3, 0xc3,
> + 0xc3, 0xc3, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc5,
> + 0xc5, 0xc5, 0xc5, 0xc5, 0xc5, 0xc6, 0xc6, 0xc6,
> + 0xc6, 0xc6, 0xc6, 0xc7, 0xc7, 0xc7, 0xc7, 0xc7,
> + 0xc9, 0xc9, 0xc9, 0xc9, 0xc9, 0xc9, 0xca, 0xca,
> + 0xca, 0xca, 0xca, 0xca, 0xcb, 0xcb, 0xcb, 0xcb,
> + 0xcb, 0xcb, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc,
> + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xce, 0xce,
> + 0xce, 0xce, 0xce, 0xce, 0xcf, 0xcf, 0xcf, 0xcf,
> + 0xcf, 0xcf, 0xd0, 0xd0, 0xd0, 0xd0, 0xd0, 0xd0,
> + 0xd1, 0xd1, 0xd1, 0xd1, 0xd1, 0xd1, 0xd3, 0xd3,
> + 0xd3, 0xd3, 0xd3, 0xd3, 0xd4, 0xd4, 0xd4, 0xd4,
> + 0xd4, 0xd4, 0xd6, 0xd6, 0xd6, 0xd6, 0xd6, 0xd6,
> + 0xd7, 0xd7, 0xd7, 0xd7, 0xd7, 0xd7, 0xd8, 0xd8,
> + 0xd8, 0xd8, 0xd8, 0xd8, 0xd9, 0xd9, 0xd9, 0xd9,
> + 0xd9, 0xd9, 0xda, 0xda, 0xda, 0xda, 0xda, 0xda,
> + 0xda, 0xdb, 0xdb, 0xdb, 0xdb, 0xdb, 0xdb, 0xdd,
> + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xde, 0xde, 0xde,
> + 0xde, 0xde, 0xde, 0xdf, 0xdf, 0xdf, 0xdf, 0xdf,
> + 0xdf, 0xe0, 0xe0, 0xe0, 0xe0, 0xe0, 0xe0, 0xe0,
> + 0xe1, 0xe1, 0xe1, 0xe1, 0xe1, 0xe1, 0xe2, 0xe2,
> + 0xe2, 0xe2, 0xe2, 0xe2, 0xe3, 0xe3, 0xe3, 0xe3,
> + 0xe3, 0xe3, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4,
> + 0xe4, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe6,
> + 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe7, 0xe7, 0xe7,
> + 0xe7, 0xe7, 0xe7, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8,
> + 0xe8, 0xe8, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9,
> + 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xec, 0xec,
> + 0xec, 0xec, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed,
> + 0xed, 0xed, 0xed, 0xee, 0xee, 0xee, 0xee, 0xee,
> + 0xee, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xf0,
> + 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1,
> + 0xf1, 0xf1, 0xf1, 0xf1, 0xf3, 0xf3, 0xf3, 0xf3,
> + 0xf3, 0xf3, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4,
> + 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf6, 0xf6,
> + 0xf6, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf7,
> + 0xf7, 0xf7, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8,
> + 0xf8, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xfa,
> + 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa,
> + 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
> + }
> +};
> +
> +static void set_resolution(struct gspca_dev *gspca_dev,
> + enum resolution resolution)
> +{
> + if (resolution == size_320x240) {
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x00);
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x05);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x67);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x01);
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 6);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x87);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x9b);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x09);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x9b);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_GPIO_IO, 0x9f);
> + reg_w(gspca_dev, TP6800_GPIO_DATA, 0x00);
> + reg_w(gspca_dev, TP6800_GPIO_PD, 0x40);
> + reg_w(gspca_dev, TP6800_SIF_TYPE, 0x00);
> + reg_w(gspca_dev, TP6800_REG_50, 0x00);
> + reg_w(gspca_dev, TP6800_REG_51, 0x00);
> + reg_w(gspca_dev, TP6800_REG_52, 0xff);
> + reg_w(gspca_dev, TP6800_REG_53, 0x03);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x07);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_BLK_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_TIMING_CFG, 0x17);
> + reg_w(gspca_dev, TP6800_SENSOR_CFG, 0x18);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_ST, 0x00);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_END, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_H, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_H, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_L, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_H, 0x00);
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x03);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x0e);
> + reg_w(gspca_dev, TP6800_PIXEL_START, 0x0b);
> + reg_w(gspca_dev, TP6800_PIXEL_END_L, 0x8a);
> + reg_w(gspca_dev, TP6800_PIXEL_END_H, 0x02);
> + reg_w(gspca_dev, TP6800_LINE_START, 0x0e);
> + reg_w(gspca_dev, TP6800_LINE_END_L, 0xf4);
> + reg_w(gspca_dev, TP6800_LINE_END_H, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x01);
> + cx0342_w(gspca_dev, CX0342_OUTPUT_CTRL, 0x07);
> + cx0342_w(gspca_dev, CX0342_BYPASS_MODE, 0x58);
> + cx0342_w(gspca_dev, CX0342_GPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_RBPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_L, 0xc0);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_G_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_G_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_L, 0x5c);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_L, 0xfc);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x40);
> + cx0342_w(gspca_dev, CX0342_GLOBAL_GAIN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CLOCK_GEN, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x02);
> + cx0342_w(gspca_dev, CX0342_IDLE_CTRL, 0x05);
> + cx0342_w(gspca_dev, CX0342_ADCGN, 0x00);
> + cx0342_w(gspca_dev, CX0342_ADC_CTL, 0x00);
> + cx0342_w(gspca_dev, CX0342_LVRST_BLBIAS, 0x01);
> + cx0342_w(gspca_dev, CX0342_VTHSEL, 0x0b);
> + cx0342_w(gspca_dev, CX0342_RAMP_RIV, 0x0b);
> + cx0342_w(gspca_dev, CX0342_LDOSEL, 0x07);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_H, 0x02);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x81);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_1_L_irst, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_L_irst, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_L_irst, 0x2f);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_L_itx, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_L_itx, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_L_itx, 0xe4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_L_itx, 0xee);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_L_iwl, 0x30);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_H_iwl, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_0_L_ensp, 0x34);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_L_ensp, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_L_ensp, 0xf6);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_L_ensp, 0xf4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_H_ensp, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_L_sela, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_L_sela, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_0_L_intla, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_1_L_intla, 0x29);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_L_intla, 0xf0);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_L_intla, 0xf3);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_6_0_L_xa_sel_pos, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_7_1_L_cds_pos, 0x02);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x10);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x00);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x0d);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x37);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + } else {
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x00);
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x87);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x9b);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x00);
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 6);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x05);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x67);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x0d);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x67);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_GPIO_IO, 0x9f);
> + reg_w(gspca_dev, TP6800_GPIO_DATA, 0x00);
> + reg_w(gspca_dev, TP6800_GPIO_PD, 0x40);
> + reg_w(gspca_dev, TP6800_SIF_TYPE, 0x00);
> + reg_w(gspca_dev, TP6800_REG_50, 0x00);
> + reg_w(gspca_dev, TP6800_REG_51, 0x00);
> + reg_w(gspca_dev, TP6800_REG_52, 0xff);
> + reg_w(gspca_dev, TP6800_REG_53, 0x03);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x07);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_BLK_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_TIMING_CFG, 0x17);
> + reg_w(gspca_dev, TP6800_SENSOR_CFG, 0x18);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_ST, 0x00);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_END, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_H, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_H, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_L, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_H, 0x00);
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x03);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x0a);
> + reg_w(gspca_dev, TP6800_PIXEL_START, 0x0b);
> + reg_w(gspca_dev, TP6800_PIXEL_END_L, 0x8a);
> + reg_w(gspca_dev, TP6800_PIXEL_END_H, 0x02);
> + reg_w(gspca_dev, TP6800_LINE_START, 0x0e);
> + reg_w(gspca_dev, TP6800_LINE_END_L, 0xf4);
> + reg_w(gspca_dev, TP6800_LINE_END_H, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x00);
> + cx0342_w(gspca_dev, CX0342_OUTPUT_CTRL, 0x07);
> + cx0342_w(gspca_dev, CX0342_BYPASS_MODE, 0x58);
> + cx0342_w(gspca_dev, CX0342_GPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_RBPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_L, 0xc0);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_G_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_G_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_L, 0x5c);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_L, 0xfc);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x40);
> + cx0342_w(gspca_dev, CX0342_GLOBAL_GAIN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CLOCK_GEN, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x02);
> + cx0342_w(gspca_dev, CX0342_IDLE_CTRL, 0x05);
> + cx0342_w(gspca_dev, CX0342_ADCGN, 0x00);
> + cx0342_w(gspca_dev, CX0342_ADC_CTL, 0x00);
> + cx0342_w(gspca_dev, CX0342_LVRST_BLBIAS, 0x01);
> + cx0342_w(gspca_dev, CX0342_VTHSEL, 0x0b);
> + cx0342_w(gspca_dev, CX0342_RAMP_RIV, 0x0b);
> + cx0342_w(gspca_dev, CX0342_LDOSEL, 0x07);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_H, 0x02);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x81);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_1_L_irst, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_L_irst, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_L_irst, 0x2f);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_L_itx, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_L_itx, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_L_itx, 0xe4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_L_itx, 0xee);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_L_iwl, 0x30);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_H_iwl, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_0_L_ensp, 0x34);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_L_ensp, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_L_ensp, 0xf6);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_L_ensp, 0xf4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_H_ensp, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_L_sela, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_L_sela, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_0_L_intla, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_1_L_intla, 0x29);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_L_intla, 0xf0);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_L_intla, 0xf3);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_6_0_L_xa_sel_pos, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_7_1_L_cds_pos, 0x02);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x10);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x00);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x09);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0xcf);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + }
> + {
> + __u8 color[18] = {
> + 0x4c, 0x00, 0xa9, 0x00, 0x31, 0x00,
> + 0xb6, 0x03, 0x6c, 0x03, 0xe0, 0x00,
> + 0xdf, 0x00, 0x46, 0x03, 0xdc, 0x03
> + };
> + bulk_w(gspca_dev, 0x03, color, 18);
> + }
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x00);
> + bulk_w(gspca_dev, 0x00, gamma[0], 1024);
> + bulk_w(gspca_dev, 0x01, gamma[1], 1024);
> + bulk_w(gspca_dev, 0x02, gamma[2], 1024);
It's better to check returned value after bulk_w.
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x03);
> + write_quality(gspca_dev);
> +}
> +
> +/* this function is called at probe time */
> +static int sd_config(struct gspca_dev *gspca_dev,
> + const struct usb_device_id *id)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + gspca_dev->cam.cam_mode = vga_mode;
> + gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
> + sd->quality = QUALITY_DEF;
> + sd->framerate = FRAMERATE_DEF;
> + sd->rgain = RGAIN_DEF;
> + sd->grgain = GRGAIN_DEF;
> + sd->gbgain = GBGAIN_DEF;
> + sd->bgain = BGAIN_DEF;
> + return 0;
> +}
> +
> +/* this function is called at probe and resume time */
> +static int sd_init(struct gspca_dev *gspca_dev)
> +{
> + int ret = 0;
> +
> + /* check if the device responds */
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
> + return ret;
> +}
Well, just return 0; here probably is better.
> +
> +/* -- start the camera -- */
> +static int sd_start(struct gspca_dev *gspca_dev)
> +{
> + __u8 value;
> +
> + reg_w(gspca_dev, TP6800_SIF_TYPE, 0x01);
> + reg_w(gspca_dev, TP6800_SIF_CONTROL, 0x01);
> + reg_w(gspca_dev, TP6800_GPIO_IO, 0x9f);
> + reg_r(gspca_dev, TP6800_GPIO_DATA, &value);
> + /* Does value returned signify sensor? */
> + reg_w(gspca_dev, TP6800_GPIO_DATA, 0x00);
> + reg_w(gspca_dev, TP6800_SIF_TYPE, 0x00);
> + reg_w(gspca_dev, TP6800_REG_50, 0x00);
> + reg_w(gspca_dev, TP6800_REG_51, 0x00);
> + reg_w(gspca_dev, TP6800_REG_52, 0xff);
> + reg_w(gspca_dev, TP6800_REG_53, 0x03);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x07);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_QUALITY, 0x03);
> + reg_w(gspca_dev, TP6800_BLK_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_TIMING_CFG, 0x17);
> + reg_w(gspca_dev, TP6800_SENSOR_CFG, 0x18);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_ST, 0x00);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_END, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_H, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_H, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_L, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_H, 0x00);
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x03);
> + reg_w(gspca_dev, TP6800_FORMAT, 0xf0);
> + cx0342_w(gspca_dev, CX0342_OUTPUT_CTRL, 0x07);
> + cx0342_w(gspca_dev, CX0342_BYPASS_MODE, 0x58);
> + cx0342_w(gspca_dev, CX0342_GPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_RBPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_L, 0xc0);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_G_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_G_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_L, 0x5c);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_L, 0xfc);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x40);
> + cx0342_w(gspca_dev, CX0342_GLOBAL_GAIN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CLOCK_GEN, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x02);
> + cx0342_w(gspca_dev, CX0342_IDLE_CTRL, 0x05);
> + cx0342_w(gspca_dev, CX0342_ADCGN, 0x00);
> + cx0342_w(gspca_dev, CX0342_ADC_CTL, 0x00);
> + cx0342_w(gspca_dev, CX0342_LVRST_BLBIAS, 0x01);
> + cx0342_w(gspca_dev, CX0342_VTHSEL, 0x0b);
> + cx0342_w(gspca_dev, CX0342_RAMP_RIV, 0x0b);
> + cx0342_w(gspca_dev, CX0342_LDOSEL, 0x07);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_H, 0x02);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x81);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_1_L_irst, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_L_irst, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_L_irst, 0x2f);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_L_itx, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_L_itx, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_L_itx, 0xe4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_L_itx, 0xee);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_L_iwl, 0x30);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_H_iwl, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_0_L_ensp, 0x34);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_L_ensp, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_L_ensp, 0xf6);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_L_ensp, 0xf4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_H_ensp, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_L_sela, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_L_sela, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_0_L_intla, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_1_L_intla, 0x29);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_L_intla, 0xf0);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_L_intla, 0xf3);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_6_0_L_xa_sel_pos, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_7_1_L_cds_pos, 0x02);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x87);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x9b);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x00);
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 6);
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x05);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x01);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x67);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + reg_r(gspca_dev, TP6800_DEMOSAIC_CFG, &value);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x09);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_L, 0x37);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + cx0342_w(gspca_dev, CX0342_RAW_GRGAIN_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_RAW_GBGAIN_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_RAW_RGAIN_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_RAW_BGAIN_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
> + reg_w(gspca_dev, TP6800_GPIO_IO, 0x9f);
> + reg_w(gspca_dev, TP6800_GPIO_DATA, 0x00);
> + reg_w(gspca_dev, TP6800_GPIO_PD, 0x40);
> + reg_w(gspca_dev, TP6800_SIF_TYPE, 0x00);
> + reg_w(gspca_dev, TP6800_REG_50, 0x00);
> + reg_w(gspca_dev, TP6800_REG_51, 0x00);
> + reg_w(gspca_dev, TP6800_REG_52, 0xff);
> + reg_w(gspca_dev, TP6800_REG_53, 0x03);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x07);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_BLK_THRLD, 0x40);
> + reg_w(gspca_dev, TP6800_TIMING_CFG, 0x17);
> + reg_w(gspca_dev, TP6800_SENSOR_CFG, 0x18);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_ST, 0x00);
> + reg_w(gspca_dev, TP6800_FRONT_DARK_END, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_ST_H, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_L, 0x00);
> + reg_w(gspca_dev, TP6800_REAR_DARK_END_H, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_L, 0x00);
> + reg_w(gspca_dev, TP6800_HORIZ_DARK_LINE_H, 0x00);
> + reg_w(gspca_dev, TP6800_ENDP_1_CTL, 0x03);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x0a);
> + reg_w(gspca_dev, TP6800_PIXEL_START, 0x0b);
> + reg_w(gspca_dev, TP6800_PIXEL_END_L, 0x8a);
> + reg_w(gspca_dev, TP6800_PIXEL_END_H, 0x02);
> + reg_w(gspca_dev, TP6800_LINE_START, 0x0e);
> + reg_w(gspca_dev, TP6800_LINE_END_L, 0xf4);
> + reg_w(gspca_dev, TP6800_LINE_END_H, 0x01);
> + reg_w(gspca_dev, TP6800_FORMAT, 0x00);
> + cx0342_w(gspca_dev, CX0342_OUTPUT_CTRL, 0x07);
> + cx0342_w(gspca_dev, CX0342_BYPASS_MODE, 0x58);
> + cx0342_w(gspca_dev, CX0342_GPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_RBPXLTHD_L, 0x16);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_L, 0xc0);
> + cx0342_w(gspca_dev, CX0342_PLANETHD_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_RB_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_G_GAP_L, 0xff);
> + cx0342_w(gspca_dev, CX0342_G_GAP_H, 0x07);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_L, 0x5c);
> + cx0342_w(gspca_dev, CX0342_RST_OVERFLOW_H, 0x01);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_L, 0xfc);
> + cx0342_w(gspca_dev, CX0342_DATA_OVERFLOW_H, 0x03);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_DATA_UNDERFLOW_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x40);
> + cx0342_w(gspca_dev, CX0342_GLOBAL_GAIN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CLOCK_GEN, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x02);
> + cx0342_w(gspca_dev, CX0342_IDLE_CTRL, 0x05);
> + cx0342_w(gspca_dev, CX0342_ADCGN, 0x00);
> + cx0342_w(gspca_dev, CX0342_ADC_CTL, 0x00);
> + cx0342_w(gspca_dev, CX0342_LVRST_BLBIAS, 0x01);
> + cx0342_w(gspca_dev, CX0342_VTHSEL, 0x0b);
> + cx0342_w(gspca_dev, CX0342_RAMP_RIV, 0x0b);
> + cx0342_w(gspca_dev, CX0342_LDOSEL, 0x07);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_L, 0x40);
> + cx0342_w(gspca_dev, CX0342_SPV_VALUE_H, 0x02);
> + cx0342_w(gspca_dev, CX0342_AUTO_ADC_CALIB, 0x81);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_1_L_irst, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_L_irst, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_2_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_L_irst, 0x2f);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_0_3_H_irst, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_L_itx, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_0_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_L_itx, 0x20);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_1_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_L_itx, 0xe4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_2_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_L_itx, 0xee);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_1_3_H_itx, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_L_iwl, 0x30);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_2_0_H_iwl, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_0_L_ensp, 0x34);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_L_ensp, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_1_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_L_ensp, 0xf6);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_2_H_ensp, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_L_ensp, 0xf4);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_3_3_H_ensp, 0x02);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_L_sela, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_0_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_L_sela, 0xe2);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_4_1_H_sela, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_0_L_intla, 0x26);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_1_L_intla, 0x29);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_L_intla, 0xf0);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_2_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_L_intla, 0xf3);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_5_3_H_intla, 0x00);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_6_0_L_xa_sel_pos, 0x24);
> + cx0342_w(gspca_dev, CX0342_CHANNEL_7_1_L_cds_pos, 0x02);
> + cx0342_w(gspca_dev, CX0342_TIMING_EN, 0x01);
> + reg_w(gspca_dev, TP6800_EDGE_THRLD, 0x10);
> + reg_w(gspca_dev, TP6800_DARK_CFG, 0x00);
> + reg_r(gspca_dev, TP6800_DEMOSAIC_CFG, &value);
> + reg_w(gspca_dev, TP6800_DEMOSAIC_CFG, 0x09);
> + cx0342_w(gspca_dev, CX0342_EXPO_LINE_H, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x01);
> + cx0342_w(gspca_dev, CX0342_RAW_GRGAIN_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_RAW_GBGAIN_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_RAW_RGAIN_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_RAW_BGAIN_L, 0x00);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
Looks weird. Didn't you want to check returned values after
reg_w/cx0342_w for good programming style? Looks like they return int.
Probably you can create macros or something for this.
> + set_resolution(gspca_dev, vga_mode[gspca_dev->curr_mode].priv);
> + return 0;
> +}
> +
> +static void sd_stopN(struct gspca_dev *gspca_dev)
> +{
> + usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
> +}
> +
> +static void sd_pkt_scan(struct gspca_dev *gspca_dev,
> + struct gspca_frame *frame,
> + __u8 *data,
> + int len)
> +{
> +
> + if (len && data[0] == 0x55) {
> + frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
> + if (len < 8 ||
> + data[1] != 0xff || data[2] != 0xd8 ||
> + data[3] != 0xff || data[4] != 0xfe) {
> + /* Have only seen this with corrupt frames */
> + gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
> + data, 0);
> + gspca_dev->last_packet_type = DISCARD_PACKET;
> + } else {
> + int quality;
> + int width;
> + int height;
> + __u8 sof0[19];
> +
> + width = data[5] * 16;
> + height = data[6] * 8;
> + quality = data[7];
> + if (quality > 16)
> + quality = 16;
> + memcpy(sof0, SOF0, sizeof(sof0));
> + sof0[5] = height / 256;
> + sof0[6] = height % 256;
> + sof0[7] = width / 256;
> + sof0[8] = width % 256;
> + gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
> + SOI, sizeof(SOI));
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + sof0, sizeof(sof0));
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + DHT, sizeof(DHT));
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + DQT[quality], sizeof(DQT[quality]));
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + SOS, sizeof(SOS));
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + data + 8, len - 8);
> + }
> + } else if (len && data[0] == 0xaa) {
> + gspca_dev->last_packet_type = DISCARD_PACKET;
> + } else if (len && data[0] == 0xcc) {
> + gspca_frame_add(gspca_dev, INTER_PACKET, frame,
> + data + 1, len - 1);
> + }
> +}
> +
> +static char *framerate_menu[7] = {
> + "2.5 frames/s",
> + "5 frames/s",
> + "7 frames/s",
> + "10 frames/s",
> + "15 frames/s",
> + "20 frames/s",
> + "30 frames/s"
> +};
> +
> +static int sd_querymenu(struct gspca_dev *gspca_dev,
> + struct v4l2_querymenu *menu)
> +{
> + switch (menu->id) {
> + case V4L2_CID_PRIVATE_BASE + 1:{
> + if (0 <= menu->index && menu->index <= 6) {
> + strcpy(menu->name, framerate_menu[menu->index]);
> + return 0;
> + }
> + }
> + break;
> + }
> + return -EINVAL;
> +}
> +
> +static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + sd->quality = val;
> + write_quality(gspca_dev);
> + return 0;
> +}
> +
> +static int sd_getquality(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->quality;
> + return 0;
> +}
> +
> +static int sd_setframerate(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + if (val == 6) {
> + if (vga_mode[gspca_dev->curr_mode].priv == size_320x240) {
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x06);
> + } else {
> + /* Full clockrate does not seem to work here*/
> + reg_w(gspca_dev, TP6800_FRAME_RATE, 0x86);
> + }
> + } else if (0 <= val && val <= 6) {
> + reg_w(gspca_dev, TP6800_FRAME_RATE, val);
> + }
> + sd->framerate = val;
> + return 0;
> +}
> +
> +static int sd_getframerate(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->framerate;
> + return 0;
> +}
> +
> +static int sd_setrgain(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + sd->rgain = val;
> + cx0342_w(gspca_dev, CX0342_RAW_RGAIN_H, (sd->rgain >> 8) & 0x0f);
> + cx0342_w(gspca_dev, CX0342_RAW_RGAIN_L, sd->rgain & 0xff);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
> + return 0;
> +}
> +
> +static int sd_getrgain(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->rgain;
> + return 0;
> +}
> +
> +static int sd_setgrgain(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + sd->grgain = val;
> + cx0342_w(gspca_dev, CX0342_RAW_GRGAIN_H, (sd->grgain >> 8) & 0x0f);
> + cx0342_w(gspca_dev, CX0342_RAW_GRGAIN_L, sd->grgain & 0xff);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
> + return 0;
> +}
> +
> +static int sd_getgrgain(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->grgain;
> + return 0;
> +}
> +
> +static int sd_setgbgain(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + sd->gbgain = val;
> + cx0342_w(gspca_dev, CX0342_RAW_GBGAIN_H, (sd->gbgain >> 8) & 0x0f);
> + cx0342_w(gspca_dev, CX0342_RAW_GBGAIN_L, sd->gbgain & 0xff);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
> + return 0;
> +}
> +
> +static int sd_getgbgain(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->gbgain;
> + return 0;
> +}
> +
> +static int sd_setbgain(struct gspca_dev *gspca_dev, __s32 val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + sd->bgain = val;
> + cx0342_w(gspca_dev, CX0342_RAW_BGAIN_H, (sd->bgain >> 8) & 0x0f);
> + cx0342_w(gspca_dev, CX0342_RAW_BGAIN_L, sd->bgain & 0xff);
> + cx0342_w(gspca_dev, CX0342_SYS_CTRL_0, 0x80);
> + return 0;
> +}
> +
> +static int sd_getbgain(struct gspca_dev *gspca_dev, __s32 *val)
> +{
> + struct sd *sd = (struct sd *)gspca_dev;
> +
> + *val = sd->bgain;
> + return 0;
> +}
> +
> +static const struct sd_desc sd_desc = {
> + .name = MODULE_NAME,
> + .ctrls = sd_ctrls,
> + .nctrls = ARRAY_SIZE(sd_ctrls),
> + .config = sd_config,
> + .init = sd_init,
> + .start = sd_start,
> + .stopN = sd_stopN,
> + .pkt_scan = sd_pkt_scan,
> + .querymenu = sd_querymenu,
> +
> +};
> +
> +static const __devinitdata struct usb_device_id device_table[] = {
> + {USB_DEVICE(0x06a2, 0x0003)},
> + {} /* Terminating entry */
> +};
> +
> +MODULE_DEVICE_TABLE(usb, device_table);
> +
> +static int sd_probe(struct usb_interface *interface,
> + const struct usb_device_id *id)
> +{
> + return gspca_dev_probe(interface, id, &sd_desc, sizeof(struct sd),
> + THIS_MODULE);
> +}
> +
> +static struct usb_driver tp6800_driver = {
> + .name = MODULE_NAME,
> + .id_table = device_table,
> + .probe = sd_probe,
> + .disconnect = gspca_disconnect,
> +#ifdef CONFIG_PM
> + .suspend = gspca_suspend,
> + .resume = gspca_resume,
> +#endif
> +};
> +
> +/* Module loading and unloading */
> +
> +static int __init tp6800_init(void)
> +{
> + int result;
> +
> + result = usb_register(&tp6800_driver);
> + if (result) {
> + printk(KERN_INFO "%s usb_register_failed %d\n",
> + MODULE_NAME, result);
> + } else {
> + printk(KERN_INFO "%s registered\n", MODULE_NAME);
> + }
> +
> + return result;
> +}
> +
> +static void __exit tp6800_exit(void)
> +{
> + usb_deregister(&tp6800_driver);
> + printk(KERN_INFO "%s deregistered\n", MODULE_NAME);
> +}
> +
> +module_init(tp6800_init);
> +module_exit(tp6800_exit);
--
Best regards, Klimov Alexey
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