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Message-Id: <20090407150744.D84591D046E@basil.firstfloor.org>
Date:	Tue,  7 Apr 2009 17:07:44 +0200 (CEST)
From:	Andi Kleen <andi@...stfloor.org>
To:	hpa@...or.com, linux-kernel@...r.kernel.org, mingo@...e.hu,
	tglx@...utronix.de
Subject: [PATCH] [4/28] x86: MCE: Use symbolic macros to access MCG_CAP register


Impact: cleanup

Makes the code easier to read. No functional changes.

Signed-off-by: Andi Kleen <ak@...ux.intel.com>

---
 arch/x86/include/asm/mce.h          |    2 ++
 arch/x86/kernel/cpu/mcheck/mce_64.c |    4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

Index: linux/arch/x86/kernel/cpu/mcheck/mce_64.c
===================================================================
--- linux.orig/arch/x86/kernel/cpu/mcheck/mce_64.c	2009-04-07 16:09:59.000000000 +0200
+++ linux/arch/x86/kernel/cpu/mcheck/mce_64.c	2009-04-07 16:43:15.000000000 +0200
@@ -551,7 +551,7 @@
 	unsigned b;
 
 	rdmsrl(MSR_IA32_MCG_CAP, cap);
-	b = cap & 0xff;
+	b = cap & MCG_BANKS_MASK;
 	if (b > MAX_NR_BANKS) {
 		printk(KERN_WARNING
 		       "MCE: Using only %u machine check banks out of %u\n",
@@ -570,7 +570,7 @@
 	}
 
 	/* Use accurate RIP reporting if available. */
-	if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)
+	if ((cap & MCG_EXT_P) && (MCG_NUM_EXT(cap) >= 9))
 		rip_msr = MSR_IA32_MCG_EIP;
 
 	return 0;
Index: linux/arch/x86/include/asm/mce.h
===================================================================
--- linux.orig/arch/x86/include/asm/mce.h	2009-04-07 16:09:59.000000000 +0200
+++ linux/arch/x86/include/asm/mce.h	2009-04-07 16:43:14.000000000 +0200
@@ -10,8 +10,10 @@
  * Machine Check support for x86
  */
 
+#define MCG_BANKS_MASK	 (0xff)
 #define MCG_CTL_P	 (1UL<<8)   /* MCG_CAP register available */
 #define MCG_EXT_P	 (1ULL<<9)   /* Extended registers available */
+#define MCG_NUM_EXT(c)	 (((c) >> 16) & 0xff)
 #define MCG_CMCI_P	 (1ULL<<10)  /* CMCI supported */
 
 #define MCG_STATUS_RIPV  (1UL<<0)   /* restart ip valid */
--
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