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Message-ID: <87iqlfa2ph.fsf@basil.nowhere.org>
Date: Wed, 08 Apr 2009 11:56:26 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Cc: hpa@...or.com, linux-kernel@...r.kernel.org, mingo@...e.hu,
tglx@...utronix.de
Subject: Re: [PATCH] [6/28] x86: MCE: Add machine check exception count in /proc/interrupts
Hidetoshi Seto <seto.hidetoshi@...fujitsu.com> writes:
> Andi Kleen wrote:
>> @@ -96,6 +97,12 @@
>> seq_printf(p, " Threshold APIC interrupts\n");
>> # endif
>> #endif
>> +#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
>> + seq_printf(p, "%*s: ", prec, "MCE");
>> + for_each_online_cpu(j)
>> + seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
>> + seq_printf(p, " Machine check exceptions\n");
>> +#endif
>> seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
>> #if defined(CONFIG_X86_IO_APIC)
>> seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
>
> How about unifying ifdefs?
I did it this way because these are only temporary until the 32bit<->64bit merge
patch goes in too. So next patch would be to change it to X86_NEW_MCE and
then when the old 32bit machine check code is finally dropped one or two
releases later to just X86_MCE
-Andi
--
ak@...ux.intel.com -- Speaking for myself only.
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